Specification and design of an Ethernet Interface soft IP
Autor(a) principal: | |
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Data de Publicação: | 2000 |
Outros Autores: | , , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Journal of the Brazilian Computer Society |
Texto Completo: | http://old.scielo.br/scielo.php?script=sci_arttext&pid=S0104-65002000000100002 |
Resumo: | The IP (Intellectual Property) for Ethernet Interface is a hardware module designed to execute the MAC (media access control) service on the Ethernet standard. The goal of this IP module is to provide an easy way to develop new devices with connection to an Ethernet LAN (Local Area Network). The standard protocols used make this IP module reusable for different designs with an interface to Ethernet LANs. The Ethernet Interface IP is described and simulated in VHDL. |
id |
UFRGS-28_30182d18ff0019647b03dfc9b752b84b |
---|---|
oai_identifier_str |
oai:scielo:S0104-65002000000100002 |
network_acronym_str |
UFRGS-28 |
network_name_str |
Journal of the Brazilian Computer Society |
repository_id_str |
|
spelling |
Specification and design of an Ethernet Interface soft IPEthernet interfacelocal area networkdesign with VHDLIPVLSI designThe IP (Intellectual Property) for Ethernet Interface is a hardware module designed to execute the MAC (media access control) service on the Ethernet standard. The goal of this IP module is to provide an easy way to develop new devices with connection to an Ethernet LAN (Local Area Network). The standard protocols used make this IP module reusable for different designs with an interface to Ethernet LANs. The Ethernet Interface IP is described and simulated in VHDL.Sociedade Brasileira de Computação2000-01-01info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersiontext/htmlhttp://old.scielo.br/scielo.php?script=sci_arttext&pid=S0104-65002000000100002Journal of the Brazilian Computer Society v.6 n.3 2000reponame:Journal of the Brazilian Computer Societyinstname:Sociedade Brasileira de Computação (SBC)instacron:UFRGS10.1590/S0104-65002000000100002info:eu-repo/semantics/openAccessFragoso,João LeonardoCosta,EduardoRochol,JuergenBampi,SergioReis,Ricardoeng2000-08-01T00:00:00Zoai:scielo:S0104-65002000000100002Revistahttps://journal-bcs.springeropen.com/PUBhttps://old.scielo.br/oai/scielo-oai.phpjbcs@icmc.sc.usp.br1678-48040104-6500opendoar:2000-08-01T00:00Journal of the Brazilian Computer Society - Sociedade Brasileira de Computação (SBC)false |
dc.title.none.fl_str_mv |
Specification and design of an Ethernet Interface soft IP |
title |
Specification and design of an Ethernet Interface soft IP |
spellingShingle |
Specification and design of an Ethernet Interface soft IP Fragoso,João Leonardo Ethernet interface local area network design with VHDL IP VLSI design |
title_short |
Specification and design of an Ethernet Interface soft IP |
title_full |
Specification and design of an Ethernet Interface soft IP |
title_fullStr |
Specification and design of an Ethernet Interface soft IP |
title_full_unstemmed |
Specification and design of an Ethernet Interface soft IP |
title_sort |
Specification and design of an Ethernet Interface soft IP |
author |
Fragoso,João Leonardo |
author_facet |
Fragoso,João Leonardo Costa,Eduardo Rochol,Juergen Bampi,Sergio Reis,Ricardo |
author_role |
author |
author2 |
Costa,Eduardo Rochol,Juergen Bampi,Sergio Reis,Ricardo |
author2_role |
author author author author |
dc.contributor.author.fl_str_mv |
Fragoso,João Leonardo Costa,Eduardo Rochol,Juergen Bampi,Sergio Reis,Ricardo |
dc.subject.por.fl_str_mv |
Ethernet interface local area network design with VHDL IP VLSI design |
topic |
Ethernet interface local area network design with VHDL IP VLSI design |
description |
The IP (Intellectual Property) for Ethernet Interface is a hardware module designed to execute the MAC (media access control) service on the Ethernet standard. The goal of this IP module is to provide an easy way to develop new devices with connection to an Ethernet LAN (Local Area Network). The standard protocols used make this IP module reusable for different designs with an interface to Ethernet LANs. The Ethernet Interface IP is described and simulated in VHDL. |
publishDate |
2000 |
dc.date.none.fl_str_mv |
2000-01-01 |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://old.scielo.br/scielo.php?script=sci_arttext&pid=S0104-65002000000100002 |
url |
http://old.scielo.br/scielo.php?script=sci_arttext&pid=S0104-65002000000100002 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
10.1590/S0104-65002000000100002 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
text/html |
dc.publisher.none.fl_str_mv |
Sociedade Brasileira de Computação |
publisher.none.fl_str_mv |
Sociedade Brasileira de Computação |
dc.source.none.fl_str_mv |
Journal of the Brazilian Computer Society v.6 n.3 2000 reponame:Journal of the Brazilian Computer Society instname:Sociedade Brasileira de Computação (SBC) instacron:UFRGS |
instname_str |
Sociedade Brasileira de Computação (SBC) |
instacron_str |
UFRGS |
institution |
UFRGS |
reponame_str |
Journal of the Brazilian Computer Society |
collection |
Journal of the Brazilian Computer Society |
repository.name.fl_str_mv |
Journal of the Brazilian Computer Society - Sociedade Brasileira de Computação (SBC) |
repository.mail.fl_str_mv |
jbcs@icmc.sc.usp.br |
_version_ |
1754734669540098048 |