Design considerations of a nonvolatile accumulator-based 8-bit processor

• Autor(a) principal: Cagliari, Bruna Casagranda
• Data de Publicação: 2021
• Outros Autores: Butzen, Paulo Francisco, Brum, Raphael Martins
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Institucional da UFRGS
• Texto Completo: http://hdl.handle.net/10183/223177
• topic: Memória (Informática); Engenharia de sistemas; Microeletrônica; Nonvolatile processors; Magnetic tunnel junction; Nonvolatile flip-flops

The rise of the Internet of Things (IoT) and theconstant growth of portable electronics have leveraged the con-cern with energy consumption. Nonvolatile memory (NVM)emerged as a solution to mitigate the problem due to its abilityto retain data on sleep mode without a power supply. Non-volatile processors (NVPs) may further improve energy savingby using nonvolatile flip-flops (NVFFs) to store system state,allowing the device to be turned off when idle and resume ex-ecution instantly after power-on. In view of the potential pre-sented by NVPs, this work describes the initial steps to imple-ment a nonvolatile version of Neander, a hypothetical processorcreated for educational purposes. First, we implemented Ne-ander in Register Transfer Level (RTL), separating the com-binational logic from the sequential elements. Then, the lat-ter was replaced by circuit-level descriptions of volatile flip-flops. We then validated this implementation by employinga mixed-signal simulation over a set of benchmarks. Resultshave shown the expected behavior for the whole instructionset. Then, we implemented circuit-level descriptions of mag-netic tunnel junction (MTJ) based nonvolatile flip-flops, usingan open-source MTJ model. These elements were exhaustivelyvalidated using electrical simulations. With these results, weintend to carry on the implementation and fully equip our pro-cessor with nonvolatile features such as instant wake-up.