Model driven engineering for MPSoC space exploration

Detalhes bibliográficos
Autor(a) principal: Oliveira, Marcio Ferreira da Silva
Data de Publicação: 2008
Outros Autores: Briao, Eduardo Wenzel, Nascimento, Francisco Assis Moreira do, Wagner, Flavio Rech
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UFRGS
Texto Completo: http://hdl.handle.net/10183/271412
Resumo: This paper presents a Model Driven Engineering approach for MPSoC Design Space Exploration (DSE) to deal with the ever-growing challenge of designing complex embedded systems. This approach allows the designer to automatically select the most adequate modeling solution for application, platform, and mapping between application and platform, in an integrated and simultaneous way and at a very early design stage, before system synthesis and code generation have been performed. The exploration is based on high-level estimates of physical characteristics of each candidate solution. In an experimental setting, the DSE tool automatically performs four design activities: it selects the number of processors, maps tasks to processors, allocates processors to bus segments, and sets the voltage of each processor. Experimental results, extracted from a DSE scenario for a real application, show that the proposed estimation and exploration approach may find a suitable solution regarding the design requirements and constraints in a very short time, with an acceptable accuracy, without relying on costly synthesis-and-simulation cycles.
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spelling Oliveira, Marcio Ferreira da SilvaBriao, Eduardo WenzelNascimento, Francisco Assis Moreira doWagner, Flavio Rech2024-02-02T05:07:22Z20081807-1953http://hdl.handle.net/10183/271412000665608This paper presents a Model Driven Engineering approach for MPSoC Design Space Exploration (DSE) to deal with the ever-growing challenge of designing complex embedded systems. This approach allows the designer to automatically select the most adequate modeling solution for application, platform, and mapping between application and platform, in an integrated and simultaneous way and at a very early design stage, before system synthesis and code generation have been performed. The exploration is based on high-level estimates of physical characteristics of each candidate solution. In an experimental setting, the DSE tool automatically performs four design activities: it selects the number of processors, maps tasks to processors, allocates processors to bus segments, and sets the voltage of each processor. Experimental results, extracted from a DSE scenario for a real application, show that the proposed estimation and exploration approach may find a suitable solution regarding the design requirements and constraints in a very short time, with an acceptable accuracy, without relying on costly synthesis-and-simulation cycles.application/pdfengJournal of integrated circuits and systems. Porto Alegre. Vol. 3, n. 1 (Mar. 2008), p. 13-22MicroeletrônicaDesign space explorationMulti-processor system-on-chipModel driven engineeringModel driven engineering for MPSoC space explorationinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/otherinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSTEXT000665608.pdf.txt000665608.pdf.txtExtracted Texttext/plain43121http://www.lume.ufrgs.br/bitstream/10183/271412/2/000665608.pdf.txt8478f7006ec2ecd27bf45f42a4a9b81bMD52ORIGINAL000665608.pdfTexto completo (inglês)application/pdf1043763http://www.lume.ufrgs.br/bitstream/10183/271412/1/000665608.pdf5dcade3ee0ef6ecbd1e994f978f8a160MD5110183/2714122024-02-03 06:07:53.156857oai:www.lume.ufrgs.br:10183/271412Repositório de PublicaçõesPUBhttps://lume.ufrgs.br/oai/requestopendoar:2024-02-03T08:07:53Repositório Institucional da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false
dc.title.pt_BR.fl_str_mv Model driven engineering for MPSoC space exploration
title Model driven engineering for MPSoC space exploration
spellingShingle Model driven engineering for MPSoC space exploration
Oliveira, Marcio Ferreira da Silva
Microeletrônica
Design space exploration
Multi-processor system-on-chip
Model driven engineering
title_short Model driven engineering for MPSoC space exploration
title_full Model driven engineering for MPSoC space exploration
title_fullStr Model driven engineering for MPSoC space exploration
title_full_unstemmed Model driven engineering for MPSoC space exploration
title_sort Model driven engineering for MPSoC space exploration
author Oliveira, Marcio Ferreira da Silva
author_facet Oliveira, Marcio Ferreira da Silva
Briao, Eduardo Wenzel
Nascimento, Francisco Assis Moreira do
Wagner, Flavio Rech
author_role author
author2 Briao, Eduardo Wenzel
Nascimento, Francisco Assis Moreira do
Wagner, Flavio Rech
author2_role author
author
author
dc.contributor.author.fl_str_mv Oliveira, Marcio Ferreira da Silva
Briao, Eduardo Wenzel
Nascimento, Francisco Assis Moreira do
Wagner, Flavio Rech
dc.subject.por.fl_str_mv Microeletrônica
topic Microeletrônica
Design space exploration
Multi-processor system-on-chip
Model driven engineering
dc.subject.eng.fl_str_mv Design space exploration
Multi-processor system-on-chip
Model driven engineering
description This paper presents a Model Driven Engineering approach for MPSoC Design Space Exploration (DSE) to deal with the ever-growing challenge of designing complex embedded systems. This approach allows the designer to automatically select the most adequate modeling solution for application, platform, and mapping between application and platform, in an integrated and simultaneous way and at a very early design stage, before system synthesis and code generation have been performed. The exploration is based on high-level estimates of physical characteristics of each candidate solution. In an experimental setting, the DSE tool automatically performs four design activities: it selects the number of processors, maps tasks to processors, allocates processors to bus segments, and sets the voltage of each processor. Experimental results, extracted from a DSE scenario for a real application, show that the proposed estimation and exploration approach may find a suitable solution regarding the design requirements and constraints in a very short time, with an acceptable accuracy, without relying on costly synthesis-and-simulation cycles.
publishDate 2008
dc.date.issued.fl_str_mv 2008
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000665608
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dc.relation.ispartof.pt_BR.fl_str_mv Journal of integrated circuits and systems. Porto Alegre. Vol. 3, n. 1 (Mar. 2008), p. 13-22
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