An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories

Detalhes bibliográficos
Autor(a) principal: Neuberger, Gustavo
Data de Publicação: 2005
Outros Autores: Kastensmidt, Fernanda Gusmão de Lima, Reis, Ricardo Augusto da Luz
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UFRGS
Texto Completo: http://hdl.handle.net/10183/27598
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spelling Neuberger, GustavoKastensmidt, Fernanda Gusmão de LimaReis, Ricardo Augusto da Luz2011-01-29T06:00:32Z20050740-7475http://hdl.handle.net/10183/27598000459042application/pdfengIEEE design and test of computers. California. Vol. 22, n.1 (Jan./Feb. 2005), p.50-58MicroeletrônicaCircuitos integradosTolerancia : FalhasAn Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memoriesEstrangeiroinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSORIGINAL000459042.pdf000459042.pdfTexto completo (inglês)application/pdf126454http://www.lume.ufrgs.br/bitstream/10183/27598/1/000459042.pdf8f2a41ed5dfafe416605405cf2710a44MD51TEXT000459042.pdf.txt000459042.pdf.txtExtracted Texttext/plain35757http://www.lume.ufrgs.br/bitstream/10183/27598/2/000459042.pdf.txt3b8fbf9d3254c893ae64f8775dcf3124MD52THUMBNAIL000459042.pdf.jpg000459042.pdf.jpgGenerated Thumbnailimage/jpeg1935http://www.lume.ufrgs.br/bitstream/10183/27598/3/000459042.pdf.jpge1b64ec680e1f271def797d97d556ad4MD5310183/275982021-06-13 04:33:33.147577oai:www.lume.ufrgs.br:10183/27598Repositório de PublicaçõesPUBhttps://lume.ufrgs.br/oai/requestopendoar:2021-06-13T07:33:33Repositório Institucional da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false
dc.title.pt_BR.fl_str_mv An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
title An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
spellingShingle An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
Neuberger, Gustavo
Microeletrônica
Circuitos integrados
Tolerancia : Falhas
title_short An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
title_full An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
title_fullStr An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
title_full_unstemmed An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
title_sort An Automatic technique for optimizing reed-solomon codes to improve fault tolerance in memories
author Neuberger, Gustavo
author_facet Neuberger, Gustavo
Kastensmidt, Fernanda Gusmão de Lima
Reis, Ricardo Augusto da Luz
author_role author
author2 Kastensmidt, Fernanda Gusmão de Lima
Reis, Ricardo Augusto da Luz
author2_role author
author
dc.contributor.author.fl_str_mv Neuberger, Gustavo
Kastensmidt, Fernanda Gusmão de Lima
Reis, Ricardo Augusto da Luz
dc.subject.por.fl_str_mv Microeletrônica
Circuitos integrados
Tolerancia : Falhas
topic Microeletrônica
Circuitos integrados
Tolerancia : Falhas
publishDate 2005
dc.date.issued.fl_str_mv 2005
dc.date.accessioned.fl_str_mv 2011-01-29T06:00:32Z
dc.type.driver.fl_str_mv Estrangeiro
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dc.identifier.uri.fl_str_mv http://hdl.handle.net/10183/27598
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url http://hdl.handle.net/10183/27598
dc.language.iso.fl_str_mv eng
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dc.relation.ispartof.pt_BR.fl_str_mv IEEE design and test of computers. California. Vol. 22, n.1 (Jan./Feb. 2005), p.50-58
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