Data processing section for microprocessor-like integrated circuits

Detalhes bibliográficos
Autor(a) principal: Susin, Altamiro Amadeu
Data de Publicação: 1981
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UFRGS
Texto Completo: http://hdl.handle.net/10183/27634
Resumo: A methodology for the design of complex logic VLSI circuits is presented. The target application is deseribed by an algorithm from which the structures of the control section and the data processing section of the integrated circuit are inferred. The Srchltectural aspects are discussed and a model is proposed. A set of functional cells is then presented which implements the data section.
id UFRGS-2_cab0d8cda2e818c72a074d3e35d19b46
oai_identifier_str oai:www.lume.ufrgs.br:10183/27634
network_acronym_str UFRGS-2
network_name_str Repositório Institucional da UFRGS
repository_id_str
spelling Susin, Altamiro Amadeu2011-02-01T05:58:59Z19810018-9200http://hdl.handle.net/10183/27634000100697A methodology for the design of complex logic VLSI circuits is presented. The target application is deseribed by an algorithm from which the structures of the control section and the data processing section of the integrated circuit are inferred. The Srchltectural aspects are discussed and a model is proposed. A set of functional cells is then presented which implements the data section.application/pdfengIEEE Journal of Solid-State Circuits. New York. vol. 16, n. 3 (june 1981), p. 233-235.MicroprocessadoresCircuitos integradosData processing section for microprocessor-like integrated circuitsEstrangeiroinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSORIGINAL000100697.pdf000100697.pdfTexto completo (inglês)application/pdf578148http://www.lume.ufrgs.br/bitstream/10183/27634/1/000100697.pdf9e2344d50b35ff9dcd45e5fe73015e3bMD51TEXT000100697.pdf.txt000100697.pdf.txtExtracted Texttext/plain16527http://www.lume.ufrgs.br/bitstream/10183/27634/2/000100697.pdf.txtb8de8ef536babda7e75fc1ca88b40baaMD52THUMBNAIL000100697.pdf.jpg000100697.pdf.jpgGenerated Thumbnailimage/jpeg2296http://www.lume.ufrgs.br/bitstream/10183/27634/3/000100697.pdf.jpg272f8592459563b509a26715c0f3e2d5MD5310183/276342021-06-26 04:40:06.344385oai:www.lume.ufrgs.br:10183/27634Repositório de PublicaçõesPUBhttps://lume.ufrgs.br/oai/requestopendoar:2021-06-26T07:40:06Repositório Institucional da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false
dc.title.pt_BR.fl_str_mv Data processing section for microprocessor-like integrated circuits
title Data processing section for microprocessor-like integrated circuits
spellingShingle Data processing section for microprocessor-like integrated circuits
Susin, Altamiro Amadeu
Microprocessadores
Circuitos integrados
title_short Data processing section for microprocessor-like integrated circuits
title_full Data processing section for microprocessor-like integrated circuits
title_fullStr Data processing section for microprocessor-like integrated circuits
title_full_unstemmed Data processing section for microprocessor-like integrated circuits
title_sort Data processing section for microprocessor-like integrated circuits
author Susin, Altamiro Amadeu
author_facet Susin, Altamiro Amadeu
author_role author
dc.contributor.author.fl_str_mv Susin, Altamiro Amadeu
dc.subject.por.fl_str_mv Microprocessadores
Circuitos integrados
topic Microprocessadores
Circuitos integrados
description A methodology for the design of complex logic VLSI circuits is presented. The target application is deseribed by an algorithm from which the structures of the control section and the data processing section of the integrated circuit are inferred. The Srchltectural aspects are discussed and a model is proposed. A set of functional cells is then presented which implements the data section.
publishDate 1981
dc.date.issued.fl_str_mv 1981
dc.date.accessioned.fl_str_mv 2011-02-01T05:58:59Z
dc.type.driver.fl_str_mv Estrangeiro
info:eu-repo/semantics/article
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10183/27634
dc.identifier.issn.pt_BR.fl_str_mv 0018-9200
dc.identifier.nrb.pt_BR.fl_str_mv 000100697
identifier_str_mv 0018-9200
000100697
url http://hdl.handle.net/10183/27634
dc.language.iso.fl_str_mv eng
language eng
dc.relation.ispartof.pt_BR.fl_str_mv IEEE Journal of Solid-State Circuits. New York. vol. 16, n. 3 (june 1981), p. 233-235.
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositório Institucional da UFRGS
instname:Universidade Federal do Rio Grande do Sul (UFRGS)
instacron:UFRGS
instname_str Universidade Federal do Rio Grande do Sul (UFRGS)
instacron_str UFRGS
institution UFRGS
reponame_str Repositório Institucional da UFRGS
collection Repositório Institucional da UFRGS
bitstream.url.fl_str_mv http://www.lume.ufrgs.br/bitstream/10183/27634/1/000100697.pdf
http://www.lume.ufrgs.br/bitstream/10183/27634/2/000100697.pdf.txt
http://www.lume.ufrgs.br/bitstream/10183/27634/3/000100697.pdf.jpg
bitstream.checksum.fl_str_mv 9e2344d50b35ff9dcd45e5fe73015e3b
b8de8ef536babda7e75fc1ca88b40baa
272f8592459563b509a26715c0f3e2d5
bitstream.checksumAlgorithm.fl_str_mv MD5
MD5
MD5
repository.name.fl_str_mv Repositório Institucional da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)
repository.mail.fl_str_mv
_version_ 1801224725092892672

Registros relacionados