Fault injection on a mixed-signal programmable SoC with design diversity mitigation
Autor(a) principal: | |
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Data de Publicação: | 2016 |
Outros Autores: | , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UFRGS |
Texto Completo: | http://hdl.handle.net/10183/259590 |
Resumo: | This paper presents an approach for runtime software-based fault injection, applied to a commercial mixed-signal programmable system-on-chip (PSoC). The fault-injection scheme is based on a pseudo-random sequence gen erator and software interruption. A fault tolerant data acquisition system, based on a design diversity redundant scheme, is considered as case study. The fault injection is performed by intensively inserting bit flips in the peripherals control registers of the mixed-signal PSoC blocks, as well as in the SRAM memory of the device. Results allow to evaluate the applied fault tolerance technique, indicating that the system is able to tolerate most of the generated errors. Additionally, a high fault masking effect is observed, and different criticality levels are observed for faults injected into the SRAM memory and in the peripherals control registers. |
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González Aguilera, Carlos JulioChenet, Cristiano PegoraroBalen, Tiago Roberto2023-06-28T03:29:22Z20161807-1953http://hdl.handle.net/10183/259590001024631This paper presents an approach for runtime software-based fault injection, applied to a commercial mixed-signal programmable system-on-chip (PSoC). The fault-injection scheme is based on a pseudo-random sequence gen erator and software interruption. A fault tolerant data acquisition system, based on a design diversity redundant scheme, is considered as case study. The fault injection is performed by intensively inserting bit flips in the peripherals control registers of the mixed-signal PSoC blocks, as well as in the SRAM memory of the device. Results allow to evaluate the applied fault tolerance technique, indicating that the system is able to tolerate most of the generated errors. Additionally, a high fault masking effect is observed, and different criticality levels are observed for faults injected into the SRAM memory and in the peripherals control registers.application/pdfengJournal of integrated circuits and systems. Porto Alegre, RS. Vol. 11, no. 3 (Dec. 2016), p. 185-191Injeção de falhasTolerância a falhasRedundância modular triplaFault injectionSoft-errorFault toleranceTriple modular redundancyDesign diversityMixed-signalSingle eventsData convertersProgrammable system-on-chipFault injection on a mixed-signal programmable SoC with design diversity mitigationinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/otherinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/openAccessreponame:Repositório Institucional da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSTEXT001024631.pdf.txt001024631.pdf.txtExtracted Texttext/plain31171http://www.lume.ufrgs.br/bitstream/10183/259590/2/001024631.pdf.txtc47c05584c9f8d82601c6fb68f3ef686MD52ORIGINAL001024631.pdfTexto completo (inglês)application/pdf1162299http://www.lume.ufrgs.br/bitstream/10183/259590/1/001024631.pdf6eb396eff14431a4360ee0c3d1a0619bMD5110183/2595902023-06-30 03:31:13.933863oai:www.lume.ufrgs.br:10183/259590Repositório de PublicaçõesPUBhttps://lume.ufrgs.br/oai/requestopendoar:2023-06-30T06:31:13Repositório Institucional da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false |
dc.title.pt_BR.fl_str_mv |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
title |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
spellingShingle |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation González Aguilera, Carlos Julio Injeção de falhas Tolerância a falhas Redundância modular tripla Fault injection Soft-error Fault tolerance Triple modular redundancy Design diversity Mixed-signal Single events Data converters Programmable system-on-chip |
title_short |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
title_full |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
title_fullStr |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
title_full_unstemmed |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
title_sort |
Fault injection on a mixed-signal programmable SoC with design diversity mitigation |
author |
González Aguilera, Carlos Julio |
author_facet |
González Aguilera, Carlos Julio Chenet, Cristiano Pegoraro Balen, Tiago Roberto |
author_role |
author |
author2 |
Chenet, Cristiano Pegoraro Balen, Tiago Roberto |
author2_role |
author author |
dc.contributor.author.fl_str_mv |
González Aguilera, Carlos Julio Chenet, Cristiano Pegoraro Balen, Tiago Roberto |
dc.subject.por.fl_str_mv |
Injeção de falhas Tolerância a falhas Redundância modular tripla |
topic |
Injeção de falhas Tolerância a falhas Redundância modular tripla Fault injection Soft-error Fault tolerance Triple modular redundancy Design diversity Mixed-signal Single events Data converters Programmable system-on-chip |
dc.subject.eng.fl_str_mv |
Fault injection Soft-error Fault tolerance Triple modular redundancy Design diversity Mixed-signal Single events Data converters Programmable system-on-chip |
description |
This paper presents an approach for runtime software-based fault injection, applied to a commercial mixed-signal programmable system-on-chip (PSoC). The fault-injection scheme is based on a pseudo-random sequence gen erator and software interruption. A fault tolerant data acquisition system, based on a design diversity redundant scheme, is considered as case study. The fault injection is performed by intensively inserting bit flips in the peripherals control registers of the mixed-signal PSoC blocks, as well as in the SRAM memory of the device. Results allow to evaluate the applied fault tolerance technique, indicating that the system is able to tolerate most of the generated errors. Additionally, a high fault masking effect is observed, and different criticality levels are observed for faults injected into the SRAM memory and in the peripherals control registers. |
publishDate |
2016 |
dc.date.issued.fl_str_mv |
2016 |
dc.date.accessioned.fl_str_mv |
2023-06-28T03:29:22Z |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article info:eu-repo/semantics/other |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10183/259590 |
dc.identifier.issn.pt_BR.fl_str_mv |
1807-1953 |
dc.identifier.nrb.pt_BR.fl_str_mv |
001024631 |
identifier_str_mv |
1807-1953 001024631 |
url |
http://hdl.handle.net/10183/259590 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.ispartof.pt_BR.fl_str_mv |
Journal of integrated circuits and systems. Porto Alegre, RS. Vol. 11, no. 3 (Dec. 2016), p. 185-191 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
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application/pdf |
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