Acelerando algoritmos de baixo nível em visão robótica com hardware reconfigurável

• Autor(a) principal: Araújo, Gianna Rodrigues de
• Data de Publicação: 2011
• Tipo de documento: Dissertação
• Idioma: por
• Título da fonte: Repositório Institucional da UFRN
• Texto Completo: https://repositorio.ufrn.br/jspui/handle/123456789/15473
• topic: Visão computacional. FPGA. Sistemas orientados a plataformas; CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA

A challenge that remains in the robotics field is how to make a robot to react in real time to visual stimulus. Traditional computer vision algorithms used to overcome this problem are still very expensive taking too long when using common computer processors. Very simple algorithms like image filtering or even mathematical morphology operations may take too long. Researchers have implemented image processing algorithms in high parallelism hardware devices in order to cut down the time spent in the algorithms processing, with good results. By using hardware implemented image processing techniques and a platform oriented system that uses the Nios II Processor we propose an approach that uses the hardware processing and event based programming to simplify the vision based systems while at the same time accelerating some parts of the used algorithms