Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications
Autor(a) principal: | |
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Data de Publicação: | 2015 |
Outros Autores: | , , , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://hdl.handle.net/11449/165265 |
Resumo: | The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V. |
id |
UNSP_3b0c5897df6b9b6b7773c204f7511349 |
---|---|
oai_identifier_str |
oai:repositorio.unesp.br:11449/165265 |
network_acronym_str |
UNSP |
network_name_str |
Repositório Institucional da UNESP |
repository_id_str |
2946 |
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Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC ApplicationscomponentMultiplier/dividerType-2 fuzzy logicInterval type-2 fuzzy logic controllerThe design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V.Univ Estadual Paulista, Sao Paulo, BrazilUniv Estadual Paulista, Sao Paulo, BrazilIeeeUniversidade Estadual Paulista (Unesp)Santos, Rodrigo Bispo dos [UNESP]Rocha Rizol, Paloma M. S. [UNESP]Mesquita, Leonardo [UNESP]Arnaud, A.Silveira, F.Garcia, L.2018-11-27T19:23:16Z2018-11-27T19:23:16Z2015-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject42015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, 4 p., 2015.2330-9954http://hdl.handle.net/11449/165265WOS:0003804778000729338079447464341Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas)info:eu-repo/semantics/openAccess2024-07-01T20:12:24Zoai:repositorio.unesp.br:11449/165265Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T15:08:16.719579Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
title |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
spellingShingle |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications Santos, Rodrigo Bispo dos [UNESP] component Multiplier/divider Type-2 fuzzy logic Interval type-2 fuzzy logic controller |
title_short |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
title_full |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
title_fullStr |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
title_full_unstemmed |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
title_sort |
Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications |
author |
Santos, Rodrigo Bispo dos [UNESP] |
author_facet |
Santos, Rodrigo Bispo dos [UNESP] Rocha Rizol, Paloma M. S. [UNESP] Mesquita, Leonardo [UNESP] Arnaud, A. Silveira, F. Garcia, L. |
author_role |
author |
author2 |
Rocha Rizol, Paloma M. S. [UNESP] Mesquita, Leonardo [UNESP] Arnaud, A. Silveira, F. Garcia, L. |
author2_role |
author author author author author |
dc.contributor.none.fl_str_mv |
Universidade Estadual Paulista (Unesp) |
dc.contributor.author.fl_str_mv |
Santos, Rodrigo Bispo dos [UNESP] Rocha Rizol, Paloma M. S. [UNESP] Mesquita, Leonardo [UNESP] Arnaud, A. Silveira, F. Garcia, L. |
dc.subject.por.fl_str_mv |
component Multiplier/divider Type-2 fuzzy logic Interval type-2 fuzzy logic controller |
topic |
component Multiplier/divider Type-2 fuzzy logic Interval type-2 fuzzy logic controller |
description |
The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V. |
publishDate |
2015 |
dc.date.none.fl_str_mv |
2015-01-01 2018-11-27T19:23:16Z 2018-11-27T19:23:16Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, 4 p., 2015. 2330-9954 http://hdl.handle.net/11449/165265 WOS:000380477800072 9338079447464341 |
identifier_str_mv |
2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, 4 p., 2015. 2330-9954 WOS:000380477800072 9338079447464341 |
url |
http://hdl.handle.net/11449/165265 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas) |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
4 |
dc.publisher.none.fl_str_mv |
Ieee |
publisher.none.fl_str_mv |
Ieee |
dc.source.none.fl_str_mv |
Web of Science reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1808128466198986752 |