Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers
Autor(a) principal: | |
---|---|
Data de Publicação: | 2020 |
Outros Autores: | , , , , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1109/DSD51259.2020.00070 http://hdl.handle.net/11449/209272 |
Resumo: | With more and more powerful quantum computers becoming available, there is an increasing interest in the efficient mapping of a given quantum circuit to a particular quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits. In this paper, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. We show that choosing different quantum-level decompositions can indeed have a significant impact on the mapping overhead. Based on this observation, we present an approach to perform design space exploration to obtain quantum circuits with reduced overhead by exploiting information about the targeted quantum hardware as well as the reversible circuit. An experimental evaluation shows that this approach often leads to considerable reductions of the technology mapping overhead with negligible runtime. |
id |
UNSP_43206df86dbe9ec3905817ab0be89e53 |
---|---|
oai_identifier_str |
oai:repositorio.unesp.br:11449/209272 |
network_acronym_str |
UNSP |
network_name_str |
Repositório Institucional da UNESP |
repository_id_str |
2946 |
spelling |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum ComputersWith more and more powerful quantum computers becoming available, there is an increasing interest in the efficient mapping of a given quantum circuit to a particular quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits. In this paper, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. We show that choosing different quantum-level decompositions can indeed have a significant impact on the mapping overhead. Based on this observation, we present an approach to perform design space exploration to obtain quantum circuits with reduced overhead by exploiting information about the targeted quantum hardware as well as the reversible circuit. An experimental evaluation shows that this approach often leads to considerable reductions of the technology mapping overhead with negligible runtime.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Univ Bremen, Dept Comp Sci, Bremen, GermanyDFKI GmbH, Cyber Phys Syst, Bremen, GermanySao Paulo State Univ, Sch Engn, Ilha Solteira, BrazilUniv New Brunswick, Fac Comp Sci, Fredericton, NB, CanadaSao Paulo State Univ, Sch Engn, Ilha Solteira, BrazilCAPES: 88881.189547/2018-01CAPES: 001Ieee Computer SocUniv BremenDFKI GmbHUniversidade Estadual Paulista (Unesp)Univ New BrunswickNiemann, PhilippAlmeida, Alexandre A. A. de [UNESP]Dueck, GerhardDrechsler, RolfTrost, A.Zemva, A.Skavhaug, A.2021-06-25T11:54:45Z2021-06-25T11:54:45Z2020-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject401-407http://dx.doi.org/10.1109/DSD51259.2020.000702020 23rd Euromicro Conference On Digital System Design (dsd 2020). Los Alamitos: Ieee Computer Soc, p. 401-407, 2020.http://hdl.handle.net/11449/20927210.1109/DSD51259.2020.00070WOS:000630443300059Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2020 23rd Euromicro Conference On Digital System Design (dsd 2020)info:eu-repo/semantics/openAccess2021-10-23T19:23:41Zoai:repositorio.unesp.br:11449/209272Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T23:29:48.518946Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
title |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
spellingShingle |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers Niemann, Philipp |
title_short |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
title_full |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
title_fullStr |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
title_full_unstemmed |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
title_sort |
Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers |
author |
Niemann, Philipp |
author_facet |
Niemann, Philipp Almeida, Alexandre A. A. de [UNESP] Dueck, Gerhard Drechsler, Rolf Trost, A. Zemva, A. Skavhaug, A. |
author_role |
author |
author2 |
Almeida, Alexandre A. A. de [UNESP] Dueck, Gerhard Drechsler, Rolf Trost, A. Zemva, A. Skavhaug, A. |
author2_role |
author author author author author author |
dc.contributor.none.fl_str_mv |
Univ Bremen DFKI GmbH Universidade Estadual Paulista (Unesp) Univ New Brunswick |
dc.contributor.author.fl_str_mv |
Niemann, Philipp Almeida, Alexandre A. A. de [UNESP] Dueck, Gerhard Drechsler, Rolf Trost, A. Zemva, A. Skavhaug, A. |
description |
With more and more powerful quantum computers becoming available, there is an increasing interest in the efficient mapping of a given quantum circuit to a particular quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits. In this paper, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. We show that choosing different quantum-level decompositions can indeed have a significant impact on the mapping overhead. Based on this observation, we present an approach to perform design space exploration to obtain quantum circuits with reduced overhead by exploiting information about the targeted quantum hardware as well as the reversible circuit. An experimental evaluation shows that this approach often leads to considerable reductions of the technology mapping overhead with negligible runtime. |
publishDate |
2020 |
dc.date.none.fl_str_mv |
2020-01-01 2021-06-25T11:54:45Z 2021-06-25T11:54:45Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1109/DSD51259.2020.00070 2020 23rd Euromicro Conference On Digital System Design (dsd 2020). Los Alamitos: Ieee Computer Soc, p. 401-407, 2020. http://hdl.handle.net/11449/209272 10.1109/DSD51259.2020.00070 WOS:000630443300059 |
url |
http://dx.doi.org/10.1109/DSD51259.2020.00070 http://hdl.handle.net/11449/209272 |
identifier_str_mv |
2020 23rd Euromicro Conference On Digital System Design (dsd 2020). Los Alamitos: Ieee Computer Soc, p. 401-407, 2020. 10.1109/DSD51259.2020.00070 WOS:000630443300059 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2020 23rd Euromicro Conference On Digital System Design (dsd 2020) |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
401-407 |
dc.publisher.none.fl_str_mv |
Ieee Computer Soc |
publisher.none.fl_str_mv |
Ieee Computer Soc |
dc.source.none.fl_str_mv |
Web of Science reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1808128239951937536 |