Analog design with Line-TFET device experimental data: From device to circuit level
Autor(a) principal: | |
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Data de Publicação: | 2020 |
Outros Autores: | , , , , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1088/1361-6641/ab7a08 http://hdl.handle.net/11449/198737 |
Resumo: | This work studies the use of line-tunnel field effect transistor (Line TFET) devices in analog applications. It presents the DC and small signal characteristics of these devices and compares them with other TFET topologies and with conventional MOSFET technology. The Line-TFET's saturation characteristics are also closely studied, through simulations and experimental characterization, revealing that point tunneling leakage from source to drain not only limits the bias voltage and the gate area but also makes the output conductance independent of the gate length. A common source stage is designed to illustrate and further explore this fact, making comparisons with conventional MOSFET technology. In order to obtain an amplifier with very high voltage gain, a two-stage operational transconductance amplifier is designed considering two different starting points: fixed transistor efficiency (gm/Ids) or fixed normalized current (Ids/W) in order to obtain similar conditions of performance for Line-TFET and MOSFET devices. It is revealed that the Line-TFET design always achieves much higher intrinsic voltage gain (of up to 115 dB) and is more suitable for low power, low frequency applications. Thus, a third design is performed with Line-TFET devices by using gate lengths of 100 nm, achieving 71 dB of open loop voltage gain and 18 nW of power dissipation, which may be suitable for applications such as bio-signal acquisition. |
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Repositório Institucional da UNESP |
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Analog design with Line-TFET device experimental data: From device to circuit levelThis work studies the use of line-tunnel field effect transistor (Line TFET) devices in analog applications. It presents the DC and small signal characteristics of these devices and compares them with other TFET topologies and with conventional MOSFET technology. The Line-TFET's saturation characteristics are also closely studied, through simulations and experimental characterization, revealing that point tunneling leakage from source to drain not only limits the bias voltage and the gate area but also makes the output conductance independent of the gate length. A common source stage is designed to illustrate and further explore this fact, making comparisons with conventional MOSFET technology. In order to obtain an amplifier with very high voltage gain, a two-stage operational transconductance amplifier is designed considering two different starting points: fixed transistor efficiency (gm/Ids) or fixed normalized current (Ids/W) in order to obtain similar conditions of performance for Line-TFET and MOSFET devices. It is revealed that the Line-TFET design always achieves much higher intrinsic voltage gain (of up to 115 dB) and is more suitable for low power, low frequency applications. Thus, a third design is performed with Line-TFET devices by using gate lengths of 100 nm, achieving 71 dB of open loop voltage gain and 18 nW of power dissipation, which may be suitable for applications such as bio-signal acquisition.LSI/PSI/USP University of Sao PauloImecClaRooE.E. Dept KU LeuvenSao Paulo State University (UNESP) Sao Joao da Boa VistaSao Paulo State University (UNESP) Sao Joao da Boa VistaUniversidade de São Paulo (USP)ImecClaRooKU LeuvenUniversidade Estadual Paulista (Unesp)Gon alez Filho, WalterSimoen, EddyRooyackers, RitaClaeys, CorCollaert, NadineMartino, Joao AAgopian, Paula G D [UNESP]2020-12-12T01:20:44Z2020-12-12T01:20:44Z2020-05-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articlehttp://dx.doi.org/10.1088/1361-6641/ab7a08Semiconductor Science and Technology, v. 35, n. 5, 2020.1361-66410268-1242http://hdl.handle.net/11449/19873710.1088/1361-6641/ab7a082-s2.0-85083314512Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengSemiconductor Science and Technologyinfo:eu-repo/semantics/openAccess2021-10-22T20:04:14Zoai:repositorio.unesp.br:11449/198737Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462021-10-22T20:04:14Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Analog design with Line-TFET device experimental data: From device to circuit level |
title |
Analog design with Line-TFET device experimental data: From device to circuit level |
spellingShingle |
Analog design with Line-TFET device experimental data: From device to circuit level Gon alez Filho, Walter |
title_short |
Analog design with Line-TFET device experimental data: From device to circuit level |
title_full |
Analog design with Line-TFET device experimental data: From device to circuit level |
title_fullStr |
Analog design with Line-TFET device experimental data: From device to circuit level |
title_full_unstemmed |
Analog design with Line-TFET device experimental data: From device to circuit level |
title_sort |
Analog design with Line-TFET device experimental data: From device to circuit level |
author |
Gon alez Filho, Walter |
author_facet |
Gon alez Filho, Walter Simoen, Eddy Rooyackers, Rita Claeys, Cor Collaert, Nadine Martino, Joao A Agopian, Paula G D [UNESP] |
author_role |
author |
author2 |
Simoen, Eddy Rooyackers, Rita Claeys, Cor Collaert, Nadine Martino, Joao A Agopian, Paula G D [UNESP] |
author2_role |
author author author author author author |
dc.contributor.none.fl_str_mv |
Universidade de São Paulo (USP) Imec ClaRoo KU Leuven Universidade Estadual Paulista (Unesp) |
dc.contributor.author.fl_str_mv |
Gon alez Filho, Walter Simoen, Eddy Rooyackers, Rita Claeys, Cor Collaert, Nadine Martino, Joao A Agopian, Paula G D [UNESP] |
description |
This work studies the use of line-tunnel field effect transistor (Line TFET) devices in analog applications. It presents the DC and small signal characteristics of these devices and compares them with other TFET topologies and with conventional MOSFET technology. The Line-TFET's saturation characteristics are also closely studied, through simulations and experimental characterization, revealing that point tunneling leakage from source to drain not only limits the bias voltage and the gate area but also makes the output conductance independent of the gate length. A common source stage is designed to illustrate and further explore this fact, making comparisons with conventional MOSFET technology. In order to obtain an amplifier with very high voltage gain, a two-stage operational transconductance amplifier is designed considering two different starting points: fixed transistor efficiency (gm/Ids) or fixed normalized current (Ids/W) in order to obtain similar conditions of performance for Line-TFET and MOSFET devices. It is revealed that the Line-TFET design always achieves much higher intrinsic voltage gain (of up to 115 dB) and is more suitable for low power, low frequency applications. Thus, a third design is performed with Line-TFET devices by using gate lengths of 100 nm, achieving 71 dB of open loop voltage gain and 18 nW of power dissipation, which may be suitable for applications such as bio-signal acquisition. |
publishDate |
2020 |
dc.date.none.fl_str_mv |
2020-12-12T01:20:44Z 2020-12-12T01:20:44Z 2020-05-01 |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1088/1361-6641/ab7a08 Semiconductor Science and Technology, v. 35, n. 5, 2020. 1361-6641 0268-1242 http://hdl.handle.net/11449/198737 10.1088/1361-6641/ab7a08 2-s2.0-85083314512 |
url |
http://dx.doi.org/10.1088/1361-6641/ab7a08 http://hdl.handle.net/11449/198737 |
identifier_str_mv |
Semiconductor Science and Technology, v. 35, n. 5, 2020. 1361-6641 0268-1242 10.1088/1361-6641/ab7a08 2-s2.0-85083314512 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
Semiconductor Science and Technology |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.source.none.fl_str_mv |
Scopus reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1803650197936406528 |