Study of line-TFET analog performance comparing with other TFET and MOSFET architectures

Detalhes bibliográficos
Autor(a) principal: Agopian, Paula Ghedini Der [UNESP]
Data de Publicação: 2017
Outros Autores: Martino, João Antonio, Vandooren, Anne, Rooyackers, Rita, Simoen, Eddy, Thean, Aaron, Claeys, Cor
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1016/j.sse.2016.10.021
http://hdl.handle.net/11449/169278
Resumo: In this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application.
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spelling Study of line-TFET analog performance comparing with other TFET and MOSFET architecturesDifferent device architecturesIntrinsic voltage gainLine-TFETIn this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application.Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)LSI/PSI/USP – University of São Paulo, Av. Prof. Luciano Gualberto, trav. 3 no 158, 05508-010 Sao PauloUNESP – Universidade Estadual Paulista, São João da Boa Vistaimec, Kapeldreef 75E.E. Dept KULeuvenUNESP – Universidade Estadual Paulista, São João da Boa VistaUniversidade de São Paulo (USP)Universidade Estadual Paulista (Unesp)imecKULeuvenAgopian, Paula Ghedini Der [UNESP]Martino, João AntonioVandooren, AnneRooyackers, RitaSimoen, EddyThean, AaronClaeys, Cor2018-12-11T16:45:10Z2018-12-11T16:45:10Z2017-02-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/article43-47application/pdfhttp://dx.doi.org/10.1016/j.sse.2016.10.021Solid-State Electronics, v. 128, p. 43-47.0038-1101http://hdl.handle.net/11449/16927810.1016/j.sse.2016.10.0212-s2.0-850072471042-s2.0-85007247104.pdf04969095954656960000-0002-0886-7798Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengSolid-State Electronics0,492info:eu-repo/semantics/openAccess2023-10-14T06:10:10Zoai:repositorio.unesp.br:11449/169278Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462023-10-14T06:10:10Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
title Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
spellingShingle Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
Agopian, Paula Ghedini Der [UNESP]
Different device architectures
Intrinsic voltage gain
Line-TFET
title_short Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
title_full Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
title_fullStr Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
title_full_unstemmed Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
title_sort Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
author Agopian, Paula Ghedini Der [UNESP]
author_facet Agopian, Paula Ghedini Der [UNESP]
Martino, João Antonio
Vandooren, Anne
Rooyackers, Rita
Simoen, Eddy
Thean, Aaron
Claeys, Cor
author_role author
author2 Martino, João Antonio
Vandooren, Anne
Rooyackers, Rita
Simoen, Eddy
Thean, Aaron
Claeys, Cor
author2_role author
author
author
author
author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
imec
KULeuven
dc.contributor.author.fl_str_mv Agopian, Paula Ghedini Der [UNESP]
Martino, João Antonio
Vandooren, Anne
Rooyackers, Rita
Simoen, Eddy
Thean, Aaron
Claeys, Cor
dc.subject.por.fl_str_mv Different device architectures
Intrinsic voltage gain
Line-TFET
topic Different device architectures
Intrinsic voltage gain
Line-TFET
description In this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application.
publishDate 2017
dc.date.none.fl_str_mv 2017-02-01
2018-12-11T16:45:10Z
2018-12-11T16:45:10Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1016/j.sse.2016.10.021
Solid-State Electronics, v. 128, p. 43-47.
0038-1101
http://hdl.handle.net/11449/169278
10.1016/j.sse.2016.10.021
2-s2.0-85007247104
2-s2.0-85007247104.pdf
0496909595465696
0000-0002-0886-7798
url http://dx.doi.org/10.1016/j.sse.2016.10.021
http://hdl.handle.net/11449/169278
identifier_str_mv Solid-State Electronics, v. 128, p. 43-47.
0038-1101
10.1016/j.sse.2016.10.021
2-s2.0-85007247104
2-s2.0-85007247104.pdf
0496909595465696
0000-0002-0886-7798
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv Solid-State Electronics
0,492
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 43-47
application/pdf
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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