Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures
Autor(a) principal: | |
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Data de Publicação: | 2019 |
Outros Autores: | , , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1007/978-3-030-21500-2_8 http://hdl.handle.net/11449/196312 |
Resumo: | The quantum computers available from IBM's QX project, implement circuits with Clifford+T gates. In order to implement Toffoli or NCV circuits in such architectures, they need to be mapped to Clifford+T gates. Another challenge is that some CNOT gates cannot be directly implemented in the IBM quantum computers and must be changed to comply with the specific architecture constrains. In this paper we propose a methodology to map Toffoli and NCV circuits such that they are compliant with a given IBM architecture. The proposed approach to accomplish this, is to find a set of low cost mappings for NCV and Toffoli circuits targeting IBM's architecture constraints. With this approach, the number of CNOT that need to be changed will be reduced, resulting in a smaller circuit regarding the number of gates. To evaluate the proposed approach, Toffoli circuits were mapped to Clifford+T and then realized on IBM's QX4 architecture. The benchmarks were compared with Toffoli circuits mapped without the methodology proposed in this paper and implemented on IBM QX4 using two different approaches. The results show that the proposed approach resulted in circuits with up to 67% fewer gates compared with Qiskit and with up to 50% fewer gates compared to a Clifford+T mapping algorithm. |
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Efficient Realization of Toffoli and NCV Circuits for IBM QX ArchitecturesIBM QX architecturesToffoli circuitsNCV circuitsThe quantum computers available from IBM's QX project, implement circuits with Clifford+T gates. In order to implement Toffoli or NCV circuits in such architectures, they need to be mapped to Clifford+T gates. Another challenge is that some CNOT gates cannot be directly implemented in the IBM quantum computers and must be changed to comply with the specific architecture constrains. In this paper we propose a methodology to map Toffoli and NCV circuits such that they are compliant with a given IBM architecture. The proposed approach to accomplish this, is to find a set of low cost mappings for NCV and Toffoli circuits targeting IBM's architecture constraints. With this approach, the number of CNOT that need to be changed will be reduced, resulting in a smaller circuit regarding the number of gates. To evaluate the proposed approach, Toffoli circuits were mapped to Clifford+T and then realized on IBM's QX4 architecture. The benchmarks were compared with Toffoli circuits mapped without the methodology proposed in this paper and implemented on IBM QX4 using two different approaches. The results show that the proposed approach resulted in circuits with up to 67% fewer gates compared with Qiskit and with up to 50% fewer gates compared to a Clifford+T mapping algorithm.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)NSERCFEIS Univ Estadual Paulista, Dept Elect Engn, Ilha Solteira, BrazilUniv New Brunswick, Fac Comp Sci, Fredericton, NB, CanadaFEIS Univ Estadual Paulista, Dept Elect Engn, Ilha Solteira, BrazilCAPES: 88881.189547/2018-01CNPq: 309193/2015-0CAPES: 001SpringerUniversidade Estadual Paulista (Unesp)Univ New BrunswickAlmeida, Alexandre A. A. de [UNESP]Dueck, Gerhard W.Rodrigues da Silva, Alexandre Cesar [UNESP]Thomsen, M. K.Soeken, M.2020-12-10T19:40:33Z2020-12-10T19:40:33Z2019-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject131-145http://dx.doi.org/10.1007/978-3-030-21500-2_8Reversible Computation (rc 2019). Cham: Springer International Publishing Ag, v. 11497, p. 131-145, 2019.0302-9743http://hdl.handle.net/11449/19631210.1007/978-3-030-21500-2_8WOS:000495360400008Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengReversible Computation (rc 2019)info:eu-repo/semantics/openAccess2024-07-04T19:11:39Zoai:repositorio.unesp.br:11449/196312Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T19:20:37.523710Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
title |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
spellingShingle |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures Almeida, Alexandre A. A. de [UNESP] IBM QX architectures Toffoli circuits NCV circuits |
title_short |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
title_full |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
title_fullStr |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
title_full_unstemmed |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
title_sort |
Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures |
author |
Almeida, Alexandre A. A. de [UNESP] |
author_facet |
Almeida, Alexandre A. A. de [UNESP] Dueck, Gerhard W. Rodrigues da Silva, Alexandre Cesar [UNESP] Thomsen, M. K. Soeken, M. |
author_role |
author |
author2 |
Dueck, Gerhard W. Rodrigues da Silva, Alexandre Cesar [UNESP] Thomsen, M. K. Soeken, M. |
author2_role |
author author author author |
dc.contributor.none.fl_str_mv |
Universidade Estadual Paulista (Unesp) Univ New Brunswick |
dc.contributor.author.fl_str_mv |
Almeida, Alexandre A. A. de [UNESP] Dueck, Gerhard W. Rodrigues da Silva, Alexandre Cesar [UNESP] Thomsen, M. K. Soeken, M. |
dc.subject.por.fl_str_mv |
IBM QX architectures Toffoli circuits NCV circuits |
topic |
IBM QX architectures Toffoli circuits NCV circuits |
description |
The quantum computers available from IBM's QX project, implement circuits with Clifford+T gates. In order to implement Toffoli or NCV circuits in such architectures, they need to be mapped to Clifford+T gates. Another challenge is that some CNOT gates cannot be directly implemented in the IBM quantum computers and must be changed to comply with the specific architecture constrains. In this paper we propose a methodology to map Toffoli and NCV circuits such that they are compliant with a given IBM architecture. The proposed approach to accomplish this, is to find a set of low cost mappings for NCV and Toffoli circuits targeting IBM's architecture constraints. With this approach, the number of CNOT that need to be changed will be reduced, resulting in a smaller circuit regarding the number of gates. To evaluate the proposed approach, Toffoli circuits were mapped to Clifford+T and then realized on IBM's QX4 architecture. The benchmarks were compared with Toffoli circuits mapped without the methodology proposed in this paper and implemented on IBM QX4 using two different approaches. The results show that the proposed approach resulted in circuits with up to 67% fewer gates compared with Qiskit and with up to 50% fewer gates compared to a Clifford+T mapping algorithm. |
publishDate |
2019 |
dc.date.none.fl_str_mv |
2019-01-01 2020-12-10T19:40:33Z 2020-12-10T19:40:33Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1007/978-3-030-21500-2_8 Reversible Computation (rc 2019). Cham: Springer International Publishing Ag, v. 11497, p. 131-145, 2019. 0302-9743 http://hdl.handle.net/11449/196312 10.1007/978-3-030-21500-2_8 WOS:000495360400008 |
url |
http://dx.doi.org/10.1007/978-3-030-21500-2_8 http://hdl.handle.net/11449/196312 |
identifier_str_mv |
Reversible Computation (rc 2019). Cham: Springer International Publishing Ag, v. 11497, p. 131-145, 2019. 0302-9743 10.1007/978-3-030-21500-2_8 WOS:000495360400008 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
Reversible Computation (rc 2019) |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
131-145 |
dc.publisher.none.fl_str_mv |
Springer |
publisher.none.fl_str_mv |
Springer |
dc.source.none.fl_str_mv |
Web of Science reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
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1808129055226068992 |