Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations

Detalhes bibliográficos
Autor(a) principal: SILVA, PAULO RODRIGUES
Data de Publicação: 2020
Outros Autores: Michelly De Souza
Tipo de documento: Artigo
Título da fonte: Biblioteca Digital de Teses e Dissertações da FEI
Texto Completo: https://repositorio.fei.edu.br/handle/FEI/3459
Resumo: 15
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spelling Creative Commons "Este é um artigo publicado em acesso aberto sob uma licença Creative Commons (CC BY-NC-ND 4.0). Fonte: https://jics.org.br/ojs/index.php/JICS/article/view/159. Acesso em: 11 nov. 2021.info:eu-repo/semantics/openAccessSILVA, PAULO RODRIGUESMichelly De Souzahttps://orcid.org/0000-0001-6472-48072021-11-11T18:02:12Z2021-11-11T18:02:12Z2020-07-31SILVA, P. R.; SOUZA, M. DE. Analysis of current mirrors with asymmetric Self-Cascode association of SOI MOSFETs through SPICE simulations. JICS. Journal of Integrated Circuits And Systems (ED. PORTUGUÊS), v. 15, n. 2, p. 1-5, 2020.1807-1953https://repositorio.fei.edu.br/handle/FEI/345910.29292/jics.v15i2.159JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS)SOI nMOSFET transistorAsymmetric self-cascodeComposite transistorCurrent MirrorSPICE SimulationRoboticsAnalysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulationsinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/article15215reponame:Biblioteca Digital de Teses e Dissertações da FEIinstname:Centro Universitário da Fundação Educacional Inaciana (FEI)instacron:FEIIn this paper the performance of different architectures of current mirrors implemented with single SOI transistors and self-cascode transistors, both symmetric and asymmetric is evaluated. A comparison of current mirrors figures of merit, looking for the advantages of the asymmetric composite structure in relation to a single SOI MOSFETs and the symmetric self-cascode transistor is performed. This analysis has been carried out through analytical simulations, using common-source, Cascode and Wilson current mirrors architectures. It is shown that asymmetric configuration can provide larger output resistance even in the common-source current mirror than other architectures with conventional single transistors.https://jics.org.br/ojs/index.php/JICS/article/view/159ORIGINALSouza_pdfSouza_pdfapplication/pdf511707https://repositorio.fei.edu.br/bitstream/FEI/3459/1/Souza_pdfb4fee98d01261ef9d919aaa75cd6dd27MD51TEXTSouza_pdf.txtSouza_pdf.txtExtracted texttext/plain26729https://repositorio.fei.edu.br/bitstream/FEI/3459/2/Souza_pdf.txtcd159bca7faf4db7b50752eafc185778MD52THUMBNAILSouza_pdf.jpgSouza_pdf.jpgGenerated Thumbnailimage/jpeg1729https://repositorio.fei.edu.br/bitstream/FEI/3459/3/Souza_pdf.jpgc2d099c1f0606172d8c42411618dec20MD53FEI/34592021-11-12 04:00:30.82Biblioteca Digital de Teses e Dissertaçõeshttp://sofia.fei.edu.br/pergamum/biblioteca/PRI
dc.title.pt_BR.fl_str_mv Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
title Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
spellingShingle Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
SILVA, PAULO RODRIGUES
SOI nMOSFET transistor
Asymmetric self-cascode
Composite transistor
Current Mirror
SPICE Simulation
Robotics
title_short Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
title_full Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
title_fullStr Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
title_full_unstemmed Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
title_sort Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations
author SILVA, PAULO RODRIGUES
author_facet SILVA, PAULO RODRIGUES
Michelly De Souza
author_role author
author2 Michelly De Souza
author2_role author
dc.contributor.authorOrcid.none.fl_str_mv https://orcid.org/0000-0001-6472-4807
dc.contributor.author.fl_str_mv SILVA, PAULO RODRIGUES
Michelly De Souza
dc.subject.por.fl_str_mv SOI nMOSFET transistor
Asymmetric self-cascode
Composite transistor
Current Mirror
SPICE Simulation
Robotics
topic SOI nMOSFET transistor
Asymmetric self-cascode
Composite transistor
Current Mirror
SPICE Simulation
Robotics
description 15
publishDate 2020
dc.date.issued.fl_str_mv 2020-07-31
dc.date.accessioned.fl_str_mv 2021-11-11T18:02:12Z
dc.date.available.fl_str_mv 2021-11-11T18:02:12Z
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dc.identifier.citation.fl_str_mv SILVA, P. R.; SOUZA, M. DE. Analysis of current mirrors with asymmetric Self-Cascode association of SOI MOSFETs through SPICE simulations. JICS. Journal of Integrated Circuits And Systems (ED. PORTUGUÊS), v. 15, n. 2, p. 1-5, 2020.
dc.identifier.uri.fl_str_mv https://repositorio.fei.edu.br/handle/FEI/3459
dc.identifier.issn.none.fl_str_mv 1807-1953
dc.identifier.doi.none.fl_str_mv 10.29292/jics.v15i2.159
identifier_str_mv SILVA, P. R.; SOUZA, M. DE. Analysis of current mirrors with asymmetric Self-Cascode association of SOI MOSFETs through SPICE simulations. JICS. Journal of Integrated Circuits And Systems (ED. PORTUGUÊS), v. 15, n. 2, p. 1-5, 2020.
1807-1953
10.29292/jics.v15i2.159
url https://repositorio.fei.edu.br/handle/FEI/3459
dc.relation.ispartof.none.fl_str_mv JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS)
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