Oxide TFTs with high mobility and stability through multi-layer semiconductors

• Autor(a) principal: Laranjeira, Tiago Josué Brás de Castro
• Data de Publicação: 2023
• Tipo de documento: Dissertação
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: http://hdl.handle.net/10362/163870
• topic: IZO; IGZO; Dual-Active Layer; Thin Film Transistor; Domínio/Área Científica::Engenharia e Tecnologia::Nanotecnologia

As the market of flexible electronics continues to grow, it is imperative to find transistor technologies that enable good electrical performance and mechanical reliability, without neglecting low cost, low temperature, and large-area fabrication. Upcoming applications in complex flexible circuitry demand significant improvements in both device stability and mobility. One of the methods being researched to accomplish this is to use semiconductor layer engineering. In this study, a dual-active layer architecturewas explored in a staggered, bottom gate TFT configuration, consisting of a highly conductive thin film on the bottom, with a less conductive thin film on top. The first part of this work focused on the optimization of IZO thin films, fabricated by co-sputtering with In2O3 and ZnO targets, aiming towards high Hall mobility and charge carrier concentration, achieving 21.5 cm2·V−1·s−1 and 1.18 × 1020 cm−3 for each parameter, respectively, at an annealing temperature of 180 °C. In the second part of this work, the DAL TFTs were fabricated utilizing the optimized IZO as the highly conductive layer, and either a less conductive IZO layer or an IGZO layer as the less conductive one. The DAL devices that incorporated only IZO layers were found to be too conductive, but when implementing IGZO in the structure there were mobility improvements from 2.0 to 18.4 cm2·V−1·s−1 compared to IGZO only TFTs, which resulted in faster devices. Furthermore, a comparison was made between the annealing temperatures of 180 °C and 300 °C, and it was concluded that the lower temperature yielded better device performance, a desirable characteristic for smaller thermal budgets.