Active replication : towards a truly SRAM-based FPGA on-line concurrent testing

Detalhes bibliográficos
Autor(a) principal: Manuel G. Gericota
Data de Publicação: 2002
Outros Autores: Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://repositorio-aberto.up.pt/handle/10216/84977
Resumo: The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reconfigurable computing platforms, employing complex SRAM-based FPGAs. However, new semiconductor manufacturing technologies increases FPGAs probability of lifetime operation failures, requiring new on?line testing / fault-tolerance methods able to improve the dependability of the systems where they are included. The Active Replication technique present in this paper is a set of procedures that enables the implementation of a truly non-intrusive structural on-line concurrent testing approach, detecting and avoiding permanent faults and correcting errors due to transient faults.In relation to a previous technique proposed by the authors as part of the DRAFT FPGA concurrent test methodology, the Active Replication technique extends the range of circuits that can be replicated, by introducing a novel method with very low silicon overhead.
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spelling Active replication : towards a truly SRAM-based FPGA on-line concurrent testingEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informáticaElectrical engineering, Electrical engineering, Electronic engineering, Information engineeringThe reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reconfigurable computing platforms, employing complex SRAM-based FPGAs. However, new semiconductor manufacturing technologies increases FPGAs probability of lifetime operation failures, requiring new on?line testing / fault-tolerance methods able to improve the dependability of the systems where they are included. The Active Replication technique present in this paper is a set of procedures that enables the implementation of a truly non-intrusive structural on-line concurrent testing approach, detecting and avoiding permanent faults and correcting errors due to transient faults.In relation to a previous technique proposed by the authors as part of the DRAFT FPGA concurrent test methodology, the Active Replication technique extends the range of circuits that can be replicated, by introducing a novel method with very low silicon overhead.20022002-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://repositorio-aberto.up.pt/handle/10216/84977eng10.1109/OLT.2002.1030201Manuel G. GericotaGustavo R. AlvesMiguel L. SilvaJosé M. Ferreirainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T14:08:14Zoai:repositorio-aberto.up.pt:10216/84977Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:55:44.041193Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
title Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
spellingShingle Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
Manuel G. Gericota
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
title_short Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
title_full Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
title_fullStr Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
title_full_unstemmed Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
title_sort Active replication : towards a truly SRAM-based FPGA on-line concurrent testing
author Manuel G. Gericota
author_facet Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author_role author
author2 Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author2_role author
author
author
dc.contributor.author.fl_str_mv Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
dc.subject.por.fl_str_mv Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
description The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reconfigurable computing platforms, employing complex SRAM-based FPGAs. However, new semiconductor manufacturing technologies increases FPGAs probability of lifetime operation failures, requiring new on?line testing / fault-tolerance methods able to improve the dependability of the systems where they are included. The Active Replication technique present in this paper is a set of procedures that enables the implementation of a truly non-intrusive structural on-line concurrent testing approach, detecting and avoiding permanent faults and correcting errors due to transient faults.In relation to a previous technique proposed by the authors as part of the DRAFT FPGA concurrent test methodology, the Active Replication technique extends the range of circuits that can be replicated, by introducing a novel method with very low silicon overhead.
publishDate 2002
dc.date.none.fl_str_mv 2002
2002-01-01T00:00:00Z
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dc.identifier.uri.fl_str_mv https://repositorio-aberto.up.pt/handle/10216/84977
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dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 10.1109/OLT.2002.1030201
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