Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology

Detalhes bibliográficos
Autor(a) principal: Manuel G. Gericota
Data de Publicação: 2002
Outros Autores: Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
Tipo de documento: Livro
Idioma: eng
Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Texto Completo: https://hdl.handle.net/10216/84940
Resumo: The increasing use of reconfigurable computing platforms, employing SRAM-based FPGAs, opens exciting new possibilities since they enable the reutilization of same hardware resources to implement speed-critical computational tasks, without interrupting system operation. Nevertheless, larger dies and the use of smaller submicron scales in the manufacturing of this new kind of FPGAs increase the probability of lifetime operation failures, requiring new test / fault tolerance methods capable of assuring the reliability of the system. Structural concurrent test procedures become particularly important in this context, since it is now possible to replicate and release for test internal FPGA resources, concurrently with but not affecting system operation. A new dynamic replication process of active Configurable Logic Blocks (CLBs) is presented in this paper, which enables the implementation of a truly non-intrusive structural component test approach. The experimental results presented prove the effectiveness of this solution.
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spelling Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodologyEngenharia electrotécnica, Engenharia electrotécnica, electrónica e informáticaElectrical engineering, Electrical engineering, Electronic engineering, Information engineeringThe increasing use of reconfigurable computing platforms, employing SRAM-based FPGAs, opens exciting new possibilities since they enable the reutilization of same hardware resources to implement speed-critical computational tasks, without interrupting system operation. Nevertheless, larger dies and the use of smaller submicron scales in the manufacturing of this new kind of FPGAs increase the probability of lifetime operation failures, requiring new test / fault tolerance methods capable of assuring the reliability of the system. Structural concurrent test procedures become particularly important in this context, since it is now possible to replicate and release for test internal FPGA resources, concurrently with but not affecting system operation. A new dynamic replication process of active Configurable Logic Blocks (CLBs) is presented in this paper, which enables the implementation of a truly non-intrusive structural component test approach. The experimental results presented prove the effectiveness of this solution.20022002-01-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/bookapplication/pdfhttps://hdl.handle.net/10216/84940engManuel G. GericotaGustavo R. AlvesMiguel L. SilvaJosé M. Ferreirainfo:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2023-11-29T13:26:33Zoai:repositorio-aberto.up.pt:10216/84940Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-19T23:40:33.426196Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse
dc.title.none.fl_str_mv Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
title Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
spellingShingle Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
Manuel G. Gericota
Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
title_short Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
title_full Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
title_fullStr Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
title_full_unstemmed Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
title_sort Dynamic replication : the core of a truly non-intrusive SRAM-based FPGA structural concurrent test methodology
author Manuel G. Gericota
author_facet Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author_role author
author2 Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
author2_role author
author
author
dc.contributor.author.fl_str_mv Manuel G. Gericota
Gustavo R. Alves
Miguel L. Silva
José M. Ferreira
dc.subject.por.fl_str_mv Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electrical engineering, Electronic engineering, Information engineering
description The increasing use of reconfigurable computing platforms, employing SRAM-based FPGAs, opens exciting new possibilities since they enable the reutilization of same hardware resources to implement speed-critical computational tasks, without interrupting system operation. Nevertheless, larger dies and the use of smaller submicron scales in the manufacturing of this new kind of FPGAs increase the probability of lifetime operation failures, requiring new test / fault tolerance methods capable of assuring the reliability of the system. Structural concurrent test procedures become particularly important in this context, since it is now possible to replicate and release for test internal FPGA resources, concurrently with but not affecting system operation. A new dynamic replication process of active Configurable Logic Blocks (CLBs) is presented in this paper, which enables the implementation of a truly non-intrusive structural component test approach. The experimental results presented prove the effectiveness of this solution.
publishDate 2002
dc.date.none.fl_str_mv 2002
2002-01-01T00:00:00Z
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url https://hdl.handle.net/10216/84940
dc.language.iso.fl_str_mv eng
language eng
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