Papertronics: Multigate paper transistor for multifunction applications

• Autor(a) principal: Martins, Rodrigo
• Data de Publicação: 2018
• Outros Autores: Gaspar, Diana, Mendes, Manuel J., Pereira, Luis, Martins, Jorge, Bahubalindruni, Pydi, Barquinha, Pedro, Fortunato, Elvira
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://doi.org/10.1016/j.apmt.2018.07.002
• topic: Dual gate paper transistors; Multifunction paper transistors; Paper electronics; Paper functionalization; Papertronics; Materials Science(all)

The use of disposable recyclable, eco-friendly, sustainable and low-cost devices with multiple functions is becoming a demand in the emerging area of the Internet of Things as a way to decrease the degree of complexity of the electronic circuits required to serve a plethora of applications. Moreover, for low-cost disposable applications, it is relevant the systems to be recyclable. The idea beyond the present study concerns to exploit our imagination with simple questions such as: What happens if it is possible to have a simple and universal device architecture, easy to implement on paper substrates, but capable to provide different multiple functionalities? It would be possible to have a common template for electronic systems on paper that would be then easily customized depending on the final application? The present study answers to these demands by reporting the physics and electronics behavior of a multigate paper transistor where paper is simultaneously the substrate and the dielectric, while a metal-oxide-semiconductor (IGZO) is used as the active channel. Moreover, the same device is able to present logic functionalities simply by varying the amplitude and frequency of the input gate signals. These transistors operate at drain voltages of 1 V with low power, exhibiting ION/IOFF > 104 and a mobility ≈2 cm2 V−1 s−1, serving the specifications for a broad range of smart disposable low power electronics. To sustain all this, an analytical compact model was developed able to precisely reproduce the response of paper-based dual-gate FETs and provide full understanding of their unique and innovative operational characteristics.