Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates
Autor(a) principal: | |
---|---|
Data de Publicação: | 2018 |
Outros Autores: | , , , , |
Tipo de documento: | Artigo |
Idioma: | eng |
Título da fonte: | Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
Texto Completo: | https://doi.org/10.1002/aelm.201800423 |
Resumo: | project PapEl, reference PTDC/CTM-NAN/5172/2014. PD/BD/52627/2014. SFRH/BD/122286/2016. |
id |
RCAP_cf48410846abb54200c155f9ce8758af |
---|---|
oai_identifier_str |
oai:run.unl.pt:10362/71830 |
network_acronym_str |
RCAP |
network_name_str |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository_id_str |
7160 |
spelling |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gatesdual-gate oxide-based field effect transistorspaper electronicspaper transistorsuniversal logic gatesElectronic, Optical and Magnetic Materialsproject PapEl, reference PTDC/CTM-NAN/5172/2014. PD/BD/52627/2014. SFRH/BD/122286/2016.Electronics on paper enable some specific applications out of conventional ones which require innovative approaches and concepts on the design of devices and systems. Within this context, this work demonstrates that a unique set of characteristics can be combined in planar dual-gate oxide–based field effect transistors with a back floating electrode using paper simultaneously as substrate and dielectric. The working principle of these transistors relies on the formation of electric double layers at the semiconductor/paper and paper/back floating electrode interfaces (associated to ions displacement within the paper) that can be disturbed by a voltage applied at a secondary gate, by the back floating potential or by the combination of both. This feature allows for the control of the on-voltage of the transistors, from depletion to enhancement mode, for instance. Moreover, this specific characteristic allows the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the proper combination of the voltage level applied at each gate. This way a simple and universal device architecture can be envisaged towards the simplification of the production of low power electronic systems on paper.CENIMAT-i3N - Centro de Investigação de Materiais (Lab. Associado I3N)DCM - Departamento de Ciência dos MateriaisUNINOVA-Instituto de Desenvolvimento de Novas TecnologiasRUNGaspar, DianaMartins, JorgeBahubalindruni, PydiPereira, LuísFortunato, ElviraMartins, Rodrigo2019-06-05T22:21:31Z2018-12-012018-12-01T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttps://doi.org/10.1002/aelm.201800423eng2199-160XPURE: 11376513http://www.scopus.com/inward/record.url?scp=85055740789&partnerID=8YFLogxKhttps://doi.org/10.1002/aelm.201800423info:eu-repo/semantics/openAccessreponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãoinstacron:RCAAP2024-03-11T04:33:42Zoai:run.unl.pt:10362/71830Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireopendoar:71602024-03-20T03:35:13.685460Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informaçãofalse |
dc.title.none.fl_str_mv |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
title |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
spellingShingle |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates Gaspar, Diana dual-gate oxide-based field effect transistors paper electronics paper transistors universal logic gates Electronic, Optical and Magnetic Materials |
title_short |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
title_full |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
title_fullStr |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
title_full_unstemmed |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
title_sort |
Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates |
author |
Gaspar, Diana |
author_facet |
Gaspar, Diana Martins, Jorge Bahubalindruni, Pydi Pereira, Luís Fortunato, Elvira Martins, Rodrigo |
author_role |
author |
author2 |
Martins, Jorge Bahubalindruni, Pydi Pereira, Luís Fortunato, Elvira Martins, Rodrigo |
author2_role |
author author author author author |
dc.contributor.none.fl_str_mv |
CENIMAT-i3N - Centro de Investigação de Materiais (Lab. Associado I3N) DCM - Departamento de Ciência dos Materiais UNINOVA-Instituto de Desenvolvimento de Novas Tecnologias RUN |
dc.contributor.author.fl_str_mv |
Gaspar, Diana Martins, Jorge Bahubalindruni, Pydi Pereira, Luís Fortunato, Elvira Martins, Rodrigo |
dc.subject.por.fl_str_mv |
dual-gate oxide-based field effect transistors paper electronics paper transistors universal logic gates Electronic, Optical and Magnetic Materials |
topic |
dual-gate oxide-based field effect transistors paper electronics paper transistors universal logic gates Electronic, Optical and Magnetic Materials |
description |
project PapEl, reference PTDC/CTM-NAN/5172/2014. PD/BD/52627/2014. SFRH/BD/122286/2016. |
publishDate |
2018 |
dc.date.none.fl_str_mv |
2018-12-01 2018-12-01T00:00:00Z 2019-06-05T22:21:31Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/article |
format |
article |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
https://doi.org/10.1002/aelm.201800423 |
url |
https://doi.org/10.1002/aelm.201800423 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2199-160X PURE: 11376513 http://www.scopus.com/inward/record.url?scp=85055740789&partnerID=8YFLogxK https://doi.org/10.1002/aelm.201800423 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.source.none.fl_str_mv |
reponame:Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) instname:Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação instacron:RCAAP |
instname_str |
Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
instacron_str |
RCAAP |
institution |
RCAAP |
reponame_str |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
collection |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) |
repository.name.fl_str_mv |
Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos) - Agência para a Sociedade do Conhecimento (UMIC) - FCT - Sociedade da Informação |
repository.mail.fl_str_mv |
|
_version_ |
1799137973306916864 |