Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation

Detalhes bibliográficos
Autor(a) principal: Nordi, Tiago Mateus
Data de Publicação: 2021
Outros Autores: Barbosa, V. M., Gounella, R. H., Asan, Godfred, Luppe, Maximiliam, Navarro, Joao, Junior, Soares, Carmo, J. P., Fonoff, Erich Talamoni, Colombari, Eduardo [UNESP]
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/DCIS53048.2021.9666166
http://hdl.handle.net/11449/231622
Resumo: Deep-Brain Stimulation (DBS) is an emerging area to improve the life of patients with brain deceases and one with the most dynamic research towards implantable devices. This paper presents an electronic circuit to generate mild current pulses for application on Deep-Brain Stimulation (DBS). This circuit can generate current pulses with arbitrary shapes in the range of-514μA to +514μA, with a variable frequency up to at least 130Hz, and minimum pulse duration of 90μs. The simulations showed a power consumption of 1.7mW for currents with symmetric shapes and 1.2V. This circuit was designed in a low-power TSMC 65nm CMOS process, targeting implantable devices.
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spelling Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain StimulationCMOSDBSImplantable DevicesDeep-Brain Stimulation (DBS) is an emerging area to improve the life of patients with brain deceases and one with the most dynamic research towards implantable devices. This paper presents an electronic circuit to generate mild current pulses for application on Deep-Brain Stimulation (DBS). This circuit can generate current pulses with arbitrary shapes in the range of-514μA to +514μA, with a variable frequency up to at least 130Hz, and minimum pulse duration of 90μs. The simulations showed a power consumption of 1.7mW for currents with symmetric shapes and 1.2V. This circuit was designed in a low-power TSMC 65nm CMOS process, targeting implantable devices.University of São Paulo (USP) Dept of Electrical Engineering (SEL), SPUniversity of São Paulo (USP) Faculty of Medicine Department of Neurology, SPSão Paulo State University (UNESP) Faculty of Odonthology Department of Physiology and Pathology, SPSão Paulo State University (UNESP) Faculty of Odonthology Department of Physiology and Pathology, SPUniversidade de São Paulo (USP)Universidade Estadual Paulista (UNESP)Nordi, Tiago MateusBarbosa, V. M.Gounella, R. H.Asan, GodfredLuppe, MaximiliamNavarro, JoaoJunior, SoaresCarmo, J. P.Fonoff, Erich TalamoniColombari, Eduardo [UNESP]2022-04-29T08:46:37Z2022-04-29T08:46:37Z2021-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/DCIS53048.2021.966616636th Conference on Design of Circuits and Integrated Systems, DCIS 2021.http://hdl.handle.net/11449/23162210.1109/DCIS53048.2021.96661662-s2.0-85124982629Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng36th Conference on Design of Circuits and Integrated Systems, DCIS 2021info:eu-repo/semantics/openAccess2024-08-16T15:46:38Zoai:repositorio.unesp.br:11449/231622Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-16T15:46:38Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
title Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
spellingShingle Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
Nordi, Tiago Mateus
CMOS
DBS
Implantable Devices
title_short Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
title_full Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
title_fullStr Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
title_full_unstemmed Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
title_sort Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation
author Nordi, Tiago Mateus
author_facet Nordi, Tiago Mateus
Barbosa, V. M.
Gounella, R. H.
Asan, Godfred
Luppe, Maximiliam
Navarro, Joao
Junior, Soares
Carmo, J. P.
Fonoff, Erich Talamoni
Colombari, Eduardo [UNESP]
author_role author
author2 Barbosa, V. M.
Gounella, R. H.
Asan, Godfred
Luppe, Maximiliam
Navarro, Joao
Junior, Soares
Carmo, J. P.
Fonoff, Erich Talamoni
Colombari, Eduardo [UNESP]
author2_role author
author
author
author
author
author
author
author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (UNESP)
dc.contributor.author.fl_str_mv Nordi, Tiago Mateus
Barbosa, V. M.
Gounella, R. H.
Asan, Godfred
Luppe, Maximiliam
Navarro, Joao
Junior, Soares
Carmo, J. P.
Fonoff, Erich Talamoni
Colombari, Eduardo [UNESP]
dc.subject.por.fl_str_mv CMOS
DBS
Implantable Devices
topic CMOS
DBS
Implantable Devices
description Deep-Brain Stimulation (DBS) is an emerging area to improve the life of patients with brain deceases and one with the most dynamic research towards implantable devices. This paper presents an electronic circuit to generate mild current pulses for application on Deep-Brain Stimulation (DBS). This circuit can generate current pulses with arbitrary shapes in the range of-514μA to +514μA, with a variable frequency up to at least 130Hz, and minimum pulse duration of 90μs. The simulations showed a power consumption of 1.7mW for currents with symmetric shapes and 1.2V. This circuit was designed in a low-power TSMC 65nm CMOS process, targeting implantable devices.
publishDate 2021
dc.date.none.fl_str_mv 2021-01-01
2022-04-29T08:46:37Z
2022-04-29T08:46:37Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/DCIS53048.2021.9666166
36th Conference on Design of Circuits and Integrated Systems, DCIS 2021.
http://hdl.handle.net/11449/231622
10.1109/DCIS53048.2021.9666166
2-s2.0-85124982629
url http://dx.doi.org/10.1109/DCIS53048.2021.9666166
http://hdl.handle.net/11449/231622
identifier_str_mv 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021.
10.1109/DCIS53048.2021.9666166
2-s2.0-85124982629
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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