Zero Temperature Coefficient Behavior for Advanced MOSFETs

• Autor(a) principal: Martino, Loao
• Data de Publicação: 2016
• Outros Autores: Mesquita, Vinicius, Macambira, Christian, Itocazu, Vitor, Almeida, Luciano, Agopian, Paula [UNESP], Simoen, Eddy, Claeys, Cor, Jiang, Y. L., Tang, T. A., Huang, R.
• Tipo de documento: Artigo de conferência
• Idioma: eng
• Título da fonte: Repositório Institucional da UNESP
• Texto Completo: http://hdl.handle.net/11449/184617

In this work the Zero Temperature Coefficient (ZTC) is investigated experimentally using state-of-the-art industrial technologies like Ultra-Thin Body and Buried Oxide (UTBB) and triple-gate FinFETs (irradiated and/or strained devices), both fabricated on Silicon On lnsulator (SOI) wafers. A simple analytical model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (V-ZTC) is validated for these advanced devices. Although simple, the model predictions have shown good agreement with the experimental results and can be useful for low-power low-voltage analog circuit designers, where biasing at/near the ZTC point should result in low thermal drift of the circuit operation.