Zero Temperature Coefficient Behavior for Advanced MOSFETs
Autor(a) principal: | |
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Data de Publicação: | 2016 |
Outros Autores: | , , , , , , , , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://hdl.handle.net/11449/184617 |
Resumo: | In this work the Zero Temperature Coefficient (ZTC) is investigated experimentally using state-of-the-art industrial technologies like Ultra-Thin Body and Buried Oxide (UTBB) and triple-gate FinFETs (irradiated and/or strained devices), both fabricated on Silicon On lnsulator (SOI) wafers. A simple analytical model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (V-ZTC) is validated for these advanced devices. Although simple, the model predictions have shown good agreement with the experimental results and can be useful for low-power low-voltage analog circuit designers, where biasing at/near the ZTC point should result in low thermal drift of the circuit operation. |
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Repositório Institucional da UNESP |
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Zero Temperature Coefficient Behavior for Advanced MOSFETsIn this work the Zero Temperature Coefficient (ZTC) is investigated experimentally using state-of-the-art industrial technologies like Ultra-Thin Body and Buried Oxide (UTBB) and triple-gate FinFETs (irradiated and/or strained devices), both fabricated on Silicon On lnsulator (SOI) wafers. A simple analytical model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (V-ZTC) is validated for these advanced devices. Although simple, the model predictions have shown good agreement with the experimental results and can be useful for low-power low-voltage analog circuit designers, where biasing at/near the ZTC point should result in low thermal drift of the circuit operation.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)Univ Sao Paulo, LSI PSI USP, Sao Paulo, BrazilUniv Estadual Paulista, UNESP, Sao Joao Da Boa Vista, BrazilIMEC, Leuven, BelgiumKULeuven, EE Dept, Leuven, BelgiumUniv Estadual Paulista, UNESP, Sao Joao Da Boa Vista, BrazilIeeeUniversidade de São Paulo (USP)Universidade Estadual Paulista (Unesp)IMECKULeuvenMartino, LoaoMesquita, ViniciusMacambira, ChristianItocazu, VitorAlmeida, LucianoAgopian, Paula [UNESP]Simoen, EddyClaeys, CorJiang, Y. L.Tang, T. A.Huang, R.2019-10-04T12:15:16Z2019-10-04T12:15:16Z2016-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject785-7882016 13th Ieee International Conference On Solid-state And Integrated Circuit Technology (icsict). New York: Ieee, p. 785-788, 2016.http://hdl.handle.net/11449/184617WOS:00047895100021704969095954656960000-0002-0886-7798Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2016 13th Ieee International Conference On Solid-state And Integrated Circuit Technology (icsict)info:eu-repo/semantics/openAccess2021-10-23T21:47:05Zoai:repositorio.unesp.br:11449/184617Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T13:34:09.733909Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
title |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
spellingShingle |
Zero Temperature Coefficient Behavior for Advanced MOSFETs Martino, Loao |
title_short |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
title_full |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
title_fullStr |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
title_full_unstemmed |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
title_sort |
Zero Temperature Coefficient Behavior for Advanced MOSFETs |
author |
Martino, Loao |
author_facet |
Martino, Loao Mesquita, Vinicius Macambira, Christian Itocazu, Vitor Almeida, Luciano Agopian, Paula [UNESP] Simoen, Eddy Claeys, Cor Jiang, Y. L. Tang, T. A. Huang, R. |
author_role |
author |
author2 |
Mesquita, Vinicius Macambira, Christian Itocazu, Vitor Almeida, Luciano Agopian, Paula [UNESP] Simoen, Eddy Claeys, Cor Jiang, Y. L. Tang, T. A. Huang, R. |
author2_role |
author author author author author author author author author author |
dc.contributor.none.fl_str_mv |
Universidade de São Paulo (USP) Universidade Estadual Paulista (Unesp) IMEC KULeuven |
dc.contributor.author.fl_str_mv |
Martino, Loao Mesquita, Vinicius Macambira, Christian Itocazu, Vitor Almeida, Luciano Agopian, Paula [UNESP] Simoen, Eddy Claeys, Cor Jiang, Y. L. Tang, T. A. Huang, R. |
description |
In this work the Zero Temperature Coefficient (ZTC) is investigated experimentally using state-of-the-art industrial technologies like Ultra-Thin Body and Buried Oxide (UTBB) and triple-gate FinFETs (irradiated and/or strained devices), both fabricated on Silicon On lnsulator (SOI) wafers. A simple analytical model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (V-ZTC) is validated for these advanced devices. Although simple, the model predictions have shown good agreement with the experimental results and can be useful for low-power low-voltage analog circuit designers, where biasing at/near the ZTC point should result in low thermal drift of the circuit operation. |
publishDate |
2016 |
dc.date.none.fl_str_mv |
2016-01-01 2019-10-04T12:15:16Z 2019-10-04T12:15:16Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
2016 13th Ieee International Conference On Solid-state And Integrated Circuit Technology (icsict). New York: Ieee, p. 785-788, 2016. http://hdl.handle.net/11449/184617 WOS:000478951000217 0496909595465696 0000-0002-0886-7798 |
identifier_str_mv |
2016 13th Ieee International Conference On Solid-state And Integrated Circuit Technology (icsict). New York: Ieee, p. 785-788, 2016. WOS:000478951000217 0496909595465696 0000-0002-0886-7798 |
url |
http://hdl.handle.net/11449/184617 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2016 13th Ieee International Conference On Solid-state And Integrated Circuit Technology (icsict) |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
785-788 |
dc.publisher.none.fl_str_mv |
Ieee |
publisher.none.fl_str_mv |
Ieee |
dc.source.none.fl_str_mv |
Web of Science reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1808128248460083200 |