Implementation of 3-D multiple linear regression in hardware using the xilinx spartan-3AN FPGA

• Autor(a) principal: Grout, Ian
• Data de Publicação: 2019
• Outros Autores: Ferreira, Willian De Assis Pedrobon [UNESP], Silva, Alexandre Cesar Rodrigues Da [UNESP]
• Tipo de documento: Artigo de conferência
• Idioma: eng
• Título da fonte: Repositório Institucional da UNESP
• Texto Completo: http://dx.doi.org/10.1109/ECTI-CON47248.2019.8955155; http://hdl.handle.net/11449/232965
• topic: FPGA; Hardware; Linear regression; Machine learning; VHDL

In this paper, a linear regression algorithm implementation in hardware using the Field Programmable Gate Array (FPGA) is presented. A two-dimensional (2-D) simple linear regression aims to develop a linear equation of two variables based on observed data values in two dimensions. A more complex problem that this considered in this paper is the three-dimensional (3-D) multiple linear regression that approximates a linear equation of three variables based on a set of observed data points in three dimensions. The algorithm was initially modelled and verified using Python, NumPy and Matplotlib. The linear regression equation was then translated to hardware using a VHDL description of the algorithm targeting the Xilinx Spartan-3AN FPGA. In this paper, the design and simulation of the algorithm based on using the available hardware resources within the FPGA are introduced and discussed.