Low temperature performance of proton irradiated strained SOI FinFET

Detalhes bibliográficos
Autor(a) principal: Caparroz, L. F. V.
Data de Publicação: 2017
Outros Autores: Bordallo, C. C. M., Martino, J. A., Simoen, E., Claeys, C., Agopian, P. G. D. [UNESP], Sarafis, P., Nassiopoulou, A. G.
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://hdl.handle.net/11449/160097
Resumo: This paper studies for the first time the low temperature characteristics of strained SOI FinFETs submitted to proton irradiation. Both types of transistors, nMOS and pMOS, were analyzed from room temperature down to 100K, focusing on the threshold voltage (V-TH), subthreshold swing (SS), the Early voltage V-EA and the intrinsic gain voltage (A(V)). The effects of strain techniques are also studied. The p-channel devices showed a greater immunity to radiation when looking at their digital parameters while nFinFETs had a better response to proton radiation from an analog parameters point of view.
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spelling Low temperature performance of proton irradiated strained SOI FinFETFinFETlow temperatureproton radiationstrained devicesThis paper studies for the first time the low temperature characteristics of strained SOI FinFETs submitted to proton irradiation. Both types of transistors, nMOS and pMOS, were analyzed from room temperature down to 100K, focusing on the threshold voltage (V-TH), subthreshold swing (SS), the Early voltage V-EA and the intrinsic gain voltage (A(V)). The effects of strain techniques are also studied. The p-channel devices showed a greater immunity to radiation when looking at their digital parameters while nFinFETs had a better response to proton radiation from an analog parameters point of view.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Univ Sao Paulo, LSI PSI USP, Sao Paulo, BrazilIMEC, Leuven, BelgiumKatholieke Univ Leuven, EE Dept, Leuven, BelgiumSao Paulo State Univ UNESP, Campus Sao Joao da Boa Vista, Sao Paulo, BrazilSao Paulo State Univ UNESP, Campus Sao Joao da Boa Vista, Sao Paulo, BrazilIeeeUniversidade de São Paulo (USP)IMECKatholieke Univ LeuvenUniversidade Estadual Paulista (Unesp)Caparroz, L. F. V.Bordallo, C. C. M.Martino, J. A.Simoen, E.Claeys, C.Agopian, P. G. D. [UNESP]Sarafis, P.Nassiopoulou, A. G.2018-11-26T15:47:28Z2018-11-26T15:47:28Z2017-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject61-632017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017). New York: Ieee, p. 61-63, 2017.2330-5738http://hdl.handle.net/11449/160097WOS:00042521090001704969095954656960000-0002-0886-7798Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017)info:eu-repo/semantics/openAccess2021-10-23T21:44:34Zoai:repositorio.unesp.br:11449/160097Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T21:10:47.651546Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Low temperature performance of proton irradiated strained SOI FinFET
title Low temperature performance of proton irradiated strained SOI FinFET
spellingShingle Low temperature performance of proton irradiated strained SOI FinFET
Caparroz, L. F. V.
FinFET
low temperature
proton radiation
strained devices
title_short Low temperature performance of proton irradiated strained SOI FinFET
title_full Low temperature performance of proton irradiated strained SOI FinFET
title_fullStr Low temperature performance of proton irradiated strained SOI FinFET
title_full_unstemmed Low temperature performance of proton irradiated strained SOI FinFET
title_sort Low temperature performance of proton irradiated strained SOI FinFET
author Caparroz, L. F. V.
author_facet Caparroz, L. F. V.
Bordallo, C. C. M.
Martino, J. A.
Simoen, E.
Claeys, C.
Agopian, P. G. D. [UNESP]
Sarafis, P.
Nassiopoulou, A. G.
author_role author
author2 Bordallo, C. C. M.
Martino, J. A.
Simoen, E.
Claeys, C.
Agopian, P. G. D. [UNESP]
Sarafis, P.
Nassiopoulou, A. G.
author2_role author
author
author
author
author
author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
IMEC
Katholieke Univ Leuven
Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv Caparroz, L. F. V.
Bordallo, C. C. M.
Martino, J. A.
Simoen, E.
Claeys, C.
Agopian, P. G. D. [UNESP]
Sarafis, P.
Nassiopoulou, A. G.
dc.subject.por.fl_str_mv FinFET
low temperature
proton radiation
strained devices
topic FinFET
low temperature
proton radiation
strained devices
description This paper studies for the first time the low temperature characteristics of strained SOI FinFETs submitted to proton irradiation. Both types of transistors, nMOS and pMOS, were analyzed from room temperature down to 100K, focusing on the threshold voltage (V-TH), subthreshold swing (SS), the Early voltage V-EA and the intrinsic gain voltage (A(V)). The effects of strain techniques are also studied. The p-channel devices showed a greater immunity to radiation when looking at their digital parameters while nFinFETs had a better response to proton radiation from an analog parameters point of view.
publishDate 2017
dc.date.none.fl_str_mv 2017-01-01
2018-11-26T15:47:28Z
2018-11-26T15:47:28Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv 2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017). New York: Ieee, p. 61-63, 2017.
2330-5738
http://hdl.handle.net/11449/160097
WOS:000425210900017
0496909595465696
0000-0002-0886-7798
identifier_str_mv 2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017). New York: Ieee, p. 61-63, 2017.
2330-5738
WOS:000425210900017
0496909595465696
0000-0002-0886-7798
url http://hdl.handle.net/11449/160097
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017)
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 61-63
dc.publisher.none.fl_str_mv Ieee
publisher.none.fl_str_mv Ieee
dc.source.none.fl_str_mv Web of Science
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
_version_ 1808129294709293056

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