The role of intrinsic trap states in the semiconductor/insulating interface on the electrical performance of spray-coated thin-film transistors

• Autor(a) principal: Braga, João P. [UNESP]
• Data de Publicação: 2022
• Outros Autores: Amorim, Cleber A. [UNESP], Lima, Guilherme R. de [UNESP], Gozzi, Giovani [UNESP], Fugikawa-Santos, Lucas [UNESP]
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Institucional da UNESP
• Texto Completo: http://dx.doi.org/10.1016/j.mssp.2022.106984; http://hdl.handle.net/11449/240594

The effect of intrinsic defects at the semiconductor/insulating interface of spray-coated zinc oxide (ZnO) thin-film transistors (TFTs) has been studied by analysing the electrical behaviour of devices fabricated using different thicknesses of the silicon dioxide (SiO2) dielectric layer, in the 100 – 300 K temperature range. We have observed that, when normalized by the dielectric layer thickness, TFTs produced with thicker dielectrics presented improved performance (higher relative linear mobility), because of lower influence from intrinsic trap states at the semiconductor/insulating interface. A comparison of the activation energy for the density of interface defects and for the trapped surface charge evaluated from the threshold voltage variation and from the subthreshold swing was used to explain the temperature behaviour of the carrier mobility for different dielectric layer thicknesses. The results show that absolute device parameters such as saturation mobility and “on” current can obscure the deleterious effect of interface states on the electrical transport in TFTs, demonstrating the importance of analysing the electrical measurement results in the linear operation regime, where the charge carrier density in the transistor channel is more uniform and electric field effects can be parametrized.