Digital approach for the design of statistical analog data acquisition on SoCs
Autor(a) principal: | |
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Data de Publicação: | 2005 |
Tipo de documento: | Tese |
Idioma: | eng |
Título da fonte: | Biblioteca Digital de Teses e Dissertações da UFRGS |
Texto Completo: | http://hdl.handle.net/10183/11491 |
Resumo: | With the current demand for mixed-signal SoCs, an increasing number of designers are looking for ADC architectures that can be easily implemented over digital substrates. Since ADC performance is strongly dependent upon physical and electrical features, it gets more difficult for them to benefit from more recent technologies, where these features are more variable. This way, analog signal acquisition is not allowed to follow an evolutionary trend compatible with Moore’s Law. In fact, such trend shall get worst, since newer technologies are expected to have more variable characteristics. Also, for a matter of economy of scale, many times a mixed-signal SoC presents a good amount of idle processing power. In such systems it is advantageous to employ more costly digital signal processing provided that it allows a reduction in the analog area demanded or the use of less expensive analog blocks, able to cope with process variations and uncertainty. Besides the technological concerns, other factors that impact the cost of the design also advise to transfer problems from the analog to the digital domain whenever possible: design automation and self-test requirements, for instance. Recent surveys indicate that the total cost in designer hours for the analog blocks of a mixed-signal system can be up to three times the cost of the digital ones. This manuscript explores the concept of bottom-up analog acquisition design, using statistical sampling as a way to reduce the analog area demanded in the design of ADCs within mixed-signal systems. More particularly, it investigates the possibility of using digital modeling and digital compensation of non-idealities to ease the design of ADCs. The work is developed around three axes: the definition of target applications, the development of digital compensation algorithms and the exploration of architectural possibilities. New methods and architectures are defined and validated. The main notions behind the proposal are analyzed and it is shown that the approach is feasible, opening new paths of future research. Keywords: |
id |
URGS_6a239745e2341a1b9f38198249bd9f5a |
---|---|
oai_identifier_str |
oai:www.lume.ufrgs.br:10183/11491 |
network_acronym_str |
URGS |
network_name_str |
Biblioteca Digital de Teses e Dissertações da UFRGS |
repository_id_str |
1853 |
spelling |
Souza Junior, Adao Antonio deCarro, Luigi2008-01-12T05:10:25Z2005http://hdl.handle.net/10183/11491000615827With the current demand for mixed-signal SoCs, an increasing number of designers are looking for ADC architectures that can be easily implemented over digital substrates. Since ADC performance is strongly dependent upon physical and electrical features, it gets more difficult for them to benefit from more recent technologies, where these features are more variable. This way, analog signal acquisition is not allowed to follow an evolutionary trend compatible with Moore’s Law. In fact, such trend shall get worst, since newer technologies are expected to have more variable characteristics. Also, for a matter of economy of scale, many times a mixed-signal SoC presents a good amount of idle processing power. In such systems it is advantageous to employ more costly digital signal processing provided that it allows a reduction in the analog area demanded or the use of less expensive analog blocks, able to cope with process variations and uncertainty. Besides the technological concerns, other factors that impact the cost of the design also advise to transfer problems from the analog to the digital domain whenever possible: design automation and self-test requirements, for instance. Recent surveys indicate that the total cost in designer hours for the analog blocks of a mixed-signal system can be up to three times the cost of the digital ones. This manuscript explores the concept of bottom-up analog acquisition design, using statistical sampling as a way to reduce the analog area demanded in the design of ADCs within mixed-signal systems. More particularly, it investigates the possibility of using digital modeling and digital compensation of non-idealities to ease the design of ADCs. The work is developed around three axes: the definition of target applications, the development of digital compensation algorithms and the exploration of architectural possibilities. New methods and architectures are defined and validated. The main notions behind the proposal are analyzed and it is shown that the approach is feasible, opening new paths of future research. Keywords:application/pdfengMicroeletrônicaConversor analogico/digitalSoCSensoresADCStochastic quantizationMixed-signal systemsDesign space explorationAdaptive filteringAnalog testFault toleranceDigital approach for the design of statistical analog data acquisition on SoCsinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/doctoralThesisUniversidade Federal do Rio Grande do SulInstituto de InformáticaPrograma de Pós-Graduação em ComputaçãoPorto Alegre, BR-RS2005doutoradoinfo:eu-repo/semantics/openAccessreponame:Biblioteca Digital de Teses e Dissertações da UFRGSinstname:Universidade Federal do Rio Grande do Sul (UFRGS)instacron:UFRGSORIGINAL000615827.pdf000615827.pdfTexto completo (inglês)application/pdf1862261http://www.lume.ufrgs.br/bitstream/10183/11491/1/000615827.pdffde316c5c374a98c33ae286bed86dc63MD51TEXT000615827.pdf.txt000615827.pdf.txtExtracted Texttext/plain179261http://www.lume.ufrgs.br/bitstream/10183/11491/2/000615827.pdf.txt32328f74d3d97605d83947c5db358487MD52THUMBNAIL000615827.pdf.jpg000615827.pdf.jpgGenerated Thumbnailimage/jpeg1064http://www.lume.ufrgs.br/bitstream/10183/11491/3/000615827.pdf.jpgd7f7ed002530b9ff08c4e6906b636fb1MD5310183/114912021-05-07 04:39:54.684593oai:www.lume.ufrgs.br:10183/11491Biblioteca Digital de Teses e Dissertaçõeshttps://lume.ufrgs.br/handle/10183/2PUBhttps://lume.ufrgs.br/oai/requestlume@ufrgs.br||lume@ufrgs.bropendoar:18532021-05-07T07:39:54Biblioteca Digital de Teses e Dissertações da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS)false |
dc.title.pt_BR.fl_str_mv |
Digital approach for the design of statistical analog data acquisition on SoCs |
title |
Digital approach for the design of statistical analog data acquisition on SoCs |
spellingShingle |
Digital approach for the design of statistical analog data acquisition on SoCs Souza Junior, Adao Antonio de Microeletrônica Conversor analogico/digital SoC Sensores ADC Stochastic quantization Mixed-signal systems Design space exploration Adaptive filtering Analog test Fault tolerance |
title_short |
Digital approach for the design of statistical analog data acquisition on SoCs |
title_full |
Digital approach for the design of statistical analog data acquisition on SoCs |
title_fullStr |
Digital approach for the design of statistical analog data acquisition on SoCs |
title_full_unstemmed |
Digital approach for the design of statistical analog data acquisition on SoCs |
title_sort |
Digital approach for the design of statistical analog data acquisition on SoCs |
author |
Souza Junior, Adao Antonio de |
author_facet |
Souza Junior, Adao Antonio de |
author_role |
author |
dc.contributor.author.fl_str_mv |
Souza Junior, Adao Antonio de |
dc.contributor.advisor1.fl_str_mv |
Carro, Luigi |
contributor_str_mv |
Carro, Luigi |
dc.subject.por.fl_str_mv |
Microeletrônica Conversor analogico/digital SoC Sensores |
topic |
Microeletrônica Conversor analogico/digital SoC Sensores ADC Stochastic quantization Mixed-signal systems Design space exploration Adaptive filtering Analog test Fault tolerance |
dc.subject.eng.fl_str_mv |
ADC Stochastic quantization Mixed-signal systems Design space exploration Adaptive filtering Analog test Fault tolerance |
description |
With the current demand for mixed-signal SoCs, an increasing number of designers are looking for ADC architectures that can be easily implemented over digital substrates. Since ADC performance is strongly dependent upon physical and electrical features, it gets more difficult for them to benefit from more recent technologies, where these features are more variable. This way, analog signal acquisition is not allowed to follow an evolutionary trend compatible with Moore’s Law. In fact, such trend shall get worst, since newer technologies are expected to have more variable characteristics. Also, for a matter of economy of scale, many times a mixed-signal SoC presents a good amount of idle processing power. In such systems it is advantageous to employ more costly digital signal processing provided that it allows a reduction in the analog area demanded or the use of less expensive analog blocks, able to cope with process variations and uncertainty. Besides the technological concerns, other factors that impact the cost of the design also advise to transfer problems from the analog to the digital domain whenever possible: design automation and self-test requirements, for instance. Recent surveys indicate that the total cost in designer hours for the analog blocks of a mixed-signal system can be up to three times the cost of the digital ones. This manuscript explores the concept of bottom-up analog acquisition design, using statistical sampling as a way to reduce the analog area demanded in the design of ADCs within mixed-signal systems. More particularly, it investigates the possibility of using digital modeling and digital compensation of non-idealities to ease the design of ADCs. The work is developed around three axes: the definition of target applications, the development of digital compensation algorithms and the exploration of architectural possibilities. New methods and architectures are defined and validated. The main notions behind the proposal are analyzed and it is shown that the approach is feasible, opening new paths of future research. Keywords: |
publishDate |
2005 |
dc.date.issued.fl_str_mv |
2005 |
dc.date.accessioned.fl_str_mv |
2008-01-12T05:10:25Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/doctoralThesis |
format |
doctoralThesis |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://hdl.handle.net/10183/11491 |
dc.identifier.nrb.pt_BR.fl_str_mv |
000615827 |
url |
http://hdl.handle.net/10183/11491 |
identifier_str_mv |
000615827 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
application/pdf |
dc.source.none.fl_str_mv |
reponame:Biblioteca Digital de Teses e Dissertações da UFRGS instname:Universidade Federal do Rio Grande do Sul (UFRGS) instacron:UFRGS |
instname_str |
Universidade Federal do Rio Grande do Sul (UFRGS) |
instacron_str |
UFRGS |
institution |
UFRGS |
reponame_str |
Biblioteca Digital de Teses e Dissertações da UFRGS |
collection |
Biblioteca Digital de Teses e Dissertações da UFRGS |
bitstream.url.fl_str_mv |
http://www.lume.ufrgs.br/bitstream/10183/11491/1/000615827.pdf http://www.lume.ufrgs.br/bitstream/10183/11491/2/000615827.pdf.txt http://www.lume.ufrgs.br/bitstream/10183/11491/3/000615827.pdf.jpg |
bitstream.checksum.fl_str_mv |
fde316c5c374a98c33ae286bed86dc63 32328f74d3d97605d83947c5db358487 d7f7ed002530b9ff08c4e6906b636fb1 |
bitstream.checksumAlgorithm.fl_str_mv |
MD5 MD5 MD5 |
repository.name.fl_str_mv |
Biblioteca Digital de Teses e Dissertações da UFRGS - Universidade Federal do Rio Grande do Sul (UFRGS) |
repository.mail.fl_str_mv |
lume@ufrgs.br||lume@ufrgs.br |
_version_ |
1810085110252306432 |