Digital virtual neuroprocessor: design experience using Verilog HDL

• Autor(a) principal: Velez, Jorge
• Data de Publicação: 1995
• Outros Autores: Ferrari, António de Brito
• Tipo de documento: Artigo
• Idioma: eng
• Título da fonte: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
• Texto Completo: https://proa.ua.pt/index.php/revdeti/article/view/20013

This paper presents the design flow and the resulted experience in the development of a neural processor, using Verilog HDL. Describing the design steps toward the final system's description and simulationenvironment, provides a concrete illustration of the application of Verilog HDL features in the system's design testing, characterization and improvement, at the early stages of the project. The end-use neural computer's configuration comprises the Verilog HDL simulation environment as a fundamental tool for future neural software test and development.