OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices

Detalhes bibliográficos
Autor(a) principal: Nogueira, Alexandro De M.
Data de Publicação: 2019
Outros Autores: Agopian, Paula G. D. [UNESP], Rangel, Roberto, Martino, Joao A., Simoen, Eddy, Rooyackers, Rita, Claeys, Cor, Collaert, Nadine
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/S3S46989.2019.9320688
http://hdl.handle.net/11449/205175
Resumo: This paper presents, for the first time, the performance of an Operational Transconductance Amplifier (OTA) designed with the experimental data of Nanowire (NW) Si-Tunnel-FET compared to NW MOSFET devices. The experimental data of each device was used to feed the lookup table used in a Verilog-A model to simulate each OTA. The larger Miller capacitance of TFET device helps with feedback stability but results in a lower bandwidth than the MOSFET circuit. However, the TFET OTA circuit achieved an open loop gain of 94 dB and power consumption of only 0.5 μW, while the MOSFET OTA circuit achieved a gain of only 52 dB and power consumption of 131 μW for the same transistor efficiency (gm/ID). Therefore, the NW Si TFET OTA has greatly surpassed the NW MOSFET OTA in terms of gain and power, showing good prospect to be used in low frequency and ultra-low power applications.
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spelling OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devicesanalog circuitlookup tableMOSFETnanowireOTATFETultra-low powerThis paper presents, for the first time, the performance of an Operational Transconductance Amplifier (OTA) designed with the experimental data of Nanowire (NW) Si-Tunnel-FET compared to NW MOSFET devices. The experimental data of each device was used to feed the lookup table used in a Verilog-A model to simulate each OTA. The larger Miller capacitance of TFET device helps with feedback stability but results in a lower bandwidth than the MOSFET circuit. However, the TFET OTA circuit achieved an open loop gain of 94 dB and power consumption of only 0.5 μW, while the MOSFET OTA circuit achieved a gain of only 52 dB and power consumption of 131 μW for the same transistor efficiency (gm/ID). Therefore, the NW Si TFET OTA has greatly surpassed the NW MOSFET OTA in terms of gain and power, showing good prospect to be used in low frequency and ultra-low power applications.University of Sao Paulo LSI/PSI/USPUnesp Sao Paulo State UniversityImecE.E. Dept Ku LeuvenUnesp Sao Paulo State UniversityUniversidade de São Paulo (USP)Universidade Estadual Paulista (Unesp)ImecKu LeuvenNogueira, Alexandro De M.Agopian, Paula G. D. [UNESP]Rangel, RobertoMartino, Joao A.Simoen, EddyRooyackers, RitaClaeys, CorCollaert, Nadine2021-06-25T10:11:08Z2021-06-25T10:11:08Z2019-10-14info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/S3S46989.2019.93206882019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019.http://hdl.handle.net/11449/20517510.1109/S3S46989.2019.93206882-s2.0-85091087810Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019info:eu-repo/semantics/openAccess2021-10-23T11:27:15Zoai:repositorio.unesp.br:11449/205175Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T14:48:15.176381Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
title OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
spellingShingle OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
Nogueira, Alexandro De M.
analog circuit
lookup table
MOSFET
nanowire
OTA
TFET
ultra-low power
title_short OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
title_full OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
title_fullStr OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
title_full_unstemmed OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
title_sort OTA Performance Comparison Designed with Experimental NW-MOSFET and NW-TFET Devices
author Nogueira, Alexandro De M.
author_facet Nogueira, Alexandro De M.
Agopian, Paula G. D. [UNESP]
Rangel, Roberto
Martino, Joao A.
Simoen, Eddy
Rooyackers, Rita
Claeys, Cor
Collaert, Nadine
author_role author
author2 Agopian, Paula G. D. [UNESP]
Rangel, Roberto
Martino, Joao A.
Simoen, Eddy
Rooyackers, Rita
Claeys, Cor
Collaert, Nadine
author2_role author
author
author
author
author
author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
Imec
Ku Leuven
dc.contributor.author.fl_str_mv Nogueira, Alexandro De M.
Agopian, Paula G. D. [UNESP]
Rangel, Roberto
Martino, Joao A.
Simoen, Eddy
Rooyackers, Rita
Claeys, Cor
Collaert, Nadine
dc.subject.por.fl_str_mv analog circuit
lookup table
MOSFET
nanowire
OTA
TFET
ultra-low power
topic analog circuit
lookup table
MOSFET
nanowire
OTA
TFET
ultra-low power
description This paper presents, for the first time, the performance of an Operational Transconductance Amplifier (OTA) designed with the experimental data of Nanowire (NW) Si-Tunnel-FET compared to NW MOSFET devices. The experimental data of each device was used to feed the lookup table used in a Verilog-A model to simulate each OTA. The larger Miller capacitance of TFET device helps with feedback stability but results in a lower bandwidth than the MOSFET circuit. However, the TFET OTA circuit achieved an open loop gain of 94 dB and power consumption of only 0.5 μW, while the MOSFET OTA circuit achieved a gain of only 52 dB and power consumption of 131 μW for the same transistor efficiency (gm/ID). Therefore, the NW Si TFET OTA has greatly surpassed the NW MOSFET OTA in terms of gain and power, showing good prospect to be used in low frequency and ultra-low power applications.
publishDate 2019
dc.date.none.fl_str_mv 2019-10-14
2021-06-25T10:11:08Z
2021-06-25T10:11:08Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/S3S46989.2019.9320688
2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019.
http://hdl.handle.net/11449/205175
10.1109/S3S46989.2019.9320688
2-s2.0-85091087810
url http://dx.doi.org/10.1109/S3S46989.2019.9320688
http://hdl.handle.net/11449/205175
identifier_str_mv 2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019.
10.1109/S3S46989.2019.9320688
2-s2.0-85091087810
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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