Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach

Detalhes bibliográficos
Autor(a) principal: Nogueira, Alexandro de M.
Data de Publicação: 2019
Outros Autores: Agopian, Paula G. D. [UNESP], Martino, Joao A., IEEE
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://hdl.handle.net/11449/195385
Resumo: Electrical characterization of a silicon nanowire Tunnel Field Effect Transistor (TFET) is used to construct a lookup table in order to model and simulate analog circuit through Verilog-A approach. The performance of a differential amplifier with current mirror load is evaluated using the TFET lookup table model and the TSMC 130 nm CMOS process design kit. Both circuits are evaluated in two different bias, with the TFET circuit presenting 20 dB higher voltage gain and power consumption of at least three orders of magnitude smaller than CMOS technology. All the simulations were realized with Cadence Spectre software.
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spelling Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table ApproachTFETnanowirelookup tabledifferential amplifiercircuit simulationElectrical characterization of a silicon nanowire Tunnel Field Effect Transistor (TFET) is used to construct a lookup table in order to model and simulate analog circuit through Verilog-A approach. The performance of a differential amplifier with current mirror load is evaluated using the TFET lookup table model and the TSMC 130 nm CMOS process design kit. Both circuits are evaluated in two different bias, with the TFET circuit presenting 20 dB higher voltage gain and power consumption of at least three orders of magnitude smaller than CMOS technology. All the simulations were realized with Cadence Spectre software.Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Univ Sao Paulo, LSI PSI USP, Sao Paulo, BrazilSao Paulo State Univ, UNESP, Sao Joao Da Boa Vista, BrazilSao Paulo State Univ, UNESP, Sao Joao Da Boa Vista, BrazilIeeeUniversidade de São Paulo (USP)Universidade Estadual Paulista (Unesp)Nogueira, Alexandro de M.Agopian, Paula G. D. [UNESP]Martino, Joao A.IEEE2020-12-10T17:32:46Z2020-12-10T17:32:46Z2019-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject42019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019). New York: Ieee, 4 p., 2019.http://hdl.handle.net/11449/195385WOS:000534490900005Web of Sciencereponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019)info:eu-repo/semantics/openAccess2021-10-23T08:25:02Zoai:repositorio.unesp.br:11449/195385Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T20:25:45.401284Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
title Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
spellingShingle Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
Nogueira, Alexandro de M.
TFET
nanowire
lookup table
differential amplifier
circuit simulation
title_short Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
title_full Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
title_fullStr Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
title_full_unstemmed Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
title_sort Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
author Nogueira, Alexandro de M.
author_facet Nogueira, Alexandro de M.
Agopian, Paula G. D. [UNESP]
Martino, Joao A.
IEEE
author_role author
author2 Agopian, Paula G. D. [UNESP]
Martino, Joao A.
IEEE
author2_role author
author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv Nogueira, Alexandro de M.
Agopian, Paula G. D. [UNESP]
Martino, Joao A.
IEEE
dc.subject.por.fl_str_mv TFET
nanowire
lookup table
differential amplifier
circuit simulation
topic TFET
nanowire
lookup table
differential amplifier
circuit simulation
description Electrical characterization of a silicon nanowire Tunnel Field Effect Transistor (TFET) is used to construct a lookup table in order to model and simulate analog circuit through Verilog-A approach. The performance of a differential amplifier with current mirror load is evaluated using the TFET lookup table model and the TSMC 130 nm CMOS process design kit. Both circuits are evaluated in two different bias, with the TFET circuit presenting 20 dB higher voltage gain and power consumption of at least three orders of magnitude smaller than CMOS technology. All the simulations were realized with Cadence Spectre software.
publishDate 2019
dc.date.none.fl_str_mv 2019-01-01
2020-12-10T17:32:46Z
2020-12-10T17:32:46Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv 2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019). New York: Ieee, 4 p., 2019.
http://hdl.handle.net/11449/195385
WOS:000534490900005
identifier_str_mv 2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019). New York: Ieee, 4 p., 2019.
WOS:000534490900005
url http://hdl.handle.net/11449/195385
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019)
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 4
dc.publisher.none.fl_str_mv Ieee
publisher.none.fl_str_mv Ieee
dc.source.none.fl_str_mv Web of Science
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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