Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator
Autor(a) principal: | |
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Data de Publicação: | 2022 |
Outros Autores: | , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1109/SBMICRO55822.2022.9881035 http://hdl.handle.net/11449/246002 |
Resumo: | This work presents the analysis of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET applied to low-dropout voltage regulator (LDO) design. Three TFETs with sources composed by Si, SiGe an Ge are analyzed. The transistor model is based on lookup tables (LUTs) and are implemented in Verilog-A. In all LDO designs, it was defined a gm/ID of 8 V-1 for the differential amplifier transistors, the load current of 1 μ A and capacitance of 10-pF. A much higher equivalent width was needed for the Si-TFET LDO power transistor which degraded its frequency response, but it consumes an ultra-low quiescent current (300 pA). All TFET based LDOs were stable without the need of a compensator capacitor, while for the MOSFET LDO, a 5-pF capacitor was necessary. The SiGe-TFET LDO presented the higher loop gain (60 dB) which resulted in the best load regulation (0.25mV/μA). The MOSFET LDO presented low efficiency due to high quiescent current, but presented the second-best gain-bandwidth product (GBW) of 52.5 KHz and PSR at low frequency (-49.4 dB). The Ge-TFET LDO presented the best overall results, with the best GBW (70 KHz) and PSR (-52 dB at low frequencies) dissipating only 42.9 nA. |
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Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulatoranalog circuit designlow-dropout voltage regulatorsLUTnanowire transistorsTFETThis work presents the analysis of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET applied to low-dropout voltage regulator (LDO) design. Three TFETs with sources composed by Si, SiGe an Ge are analyzed. The transistor model is based on lookup tables (LUTs) and are implemented in Verilog-A. In all LDO designs, it was defined a gm/ID of 8 V-1 for the differential amplifier transistors, the load current of 1 μ A and capacitance of 10-pF. A much higher equivalent width was needed for the Si-TFET LDO power transistor which degraded its frequency response, but it consumes an ultra-low quiescent current (300 pA). All TFET based LDOs were stable without the need of a compensator capacitor, while for the MOSFET LDO, a 5-pF capacitor was necessary. The SiGe-TFET LDO presented the higher loop gain (60 dB) which resulted in the best load regulation (0.25mV/μA). The MOSFET LDO presented low efficiency due to high quiescent current, but presented the second-best gain-bandwidth product (GBW) of 52.5 KHz and PSR at low frequency (-49.4 dB). The Ge-TFET LDO presented the best overall results, with the best GBW (70 KHz) and PSR (-52 dB at low frequencies) dissipating only 42.9 nA.LSI/PSI/USP University of Sao PauloUNESP Sao Paulo State UniversityUNESP Sao Paulo State UniversityUniversidade de São Paulo (USP)Universidade Estadual Paulista (UNESP)Do Nascimento Tolêdo, RodrigoMartino, Joao AntonioDer Agopian, Paula Ghedini [UNESP]2023-07-29T12:29:04Z2023-07-29T12:29:04Z2022-01-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/SBMICRO55822.2022.988103536th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedings.http://hdl.handle.net/11449/24600210.1109/SBMICRO55822.2022.98810352-s2.0-85139192876Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng36th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedingsinfo:eu-repo/semantics/openAccess2023-07-29T12:29:04Zoai:repositorio.unesp.br:11449/246002Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T14:37:38.884422Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
title |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
spellingShingle |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator Do Nascimento Tolêdo, Rodrigo analog circuit design low-dropout voltage regulators LUT nanowire transistors TFET |
title_short |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
title_full |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
title_fullStr |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
title_full_unstemmed |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
title_sort |
Nanowire TFET with different Source Compositions applied to Low-Dropout Voltage Regulator |
author |
Do Nascimento Tolêdo, Rodrigo |
author_facet |
Do Nascimento Tolêdo, Rodrigo Martino, Joao Antonio Der Agopian, Paula Ghedini [UNESP] |
author_role |
author |
author2 |
Martino, Joao Antonio Der Agopian, Paula Ghedini [UNESP] |
author2_role |
author author |
dc.contributor.none.fl_str_mv |
Universidade de São Paulo (USP) Universidade Estadual Paulista (UNESP) |
dc.contributor.author.fl_str_mv |
Do Nascimento Tolêdo, Rodrigo Martino, Joao Antonio Der Agopian, Paula Ghedini [UNESP] |
dc.subject.por.fl_str_mv |
analog circuit design low-dropout voltage regulators LUT nanowire transistors TFET |
topic |
analog circuit design low-dropout voltage regulators LUT nanowire transistors TFET |
description |
This work presents the analysis of vertical nanowire tunnel field-effect transistors (TFETs) and vertical nanowire MOSFET applied to low-dropout voltage regulator (LDO) design. Three TFETs with sources composed by Si, SiGe an Ge are analyzed. The transistor model is based on lookup tables (LUTs) and are implemented in Verilog-A. In all LDO designs, it was defined a gm/ID of 8 V-1 for the differential amplifier transistors, the load current of 1 μ A and capacitance of 10-pF. A much higher equivalent width was needed for the Si-TFET LDO power transistor which degraded its frequency response, but it consumes an ultra-low quiescent current (300 pA). All TFET based LDOs were stable without the need of a compensator capacitor, while for the MOSFET LDO, a 5-pF capacitor was necessary. The SiGe-TFET LDO presented the higher loop gain (60 dB) which resulted in the best load regulation (0.25mV/μA). The MOSFET LDO presented low efficiency due to high quiescent current, but presented the second-best gain-bandwidth product (GBW) of 52.5 KHz and PSR at low frequency (-49.4 dB). The Ge-TFET LDO presented the best overall results, with the best GBW (70 KHz) and PSR (-52 dB at low frequencies) dissipating only 42.9 nA. |
publishDate |
2022 |
dc.date.none.fl_str_mv |
2022-01-01 2023-07-29T12:29:04Z 2023-07-29T12:29:04Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1109/SBMICRO55822.2022.9881035 36th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedings. http://hdl.handle.net/11449/246002 10.1109/SBMICRO55822.2022.9881035 2-s2.0-85139192876 |
url |
http://dx.doi.org/10.1109/SBMICRO55822.2022.9881035 http://hdl.handle.net/11449/246002 |
identifier_str_mv |
36th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedings. 10.1109/SBMICRO55822.2022.9881035 2-s2.0-85139192876 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
36th Symposium on Microelectronics Technology, SBMICRO 2022 - Proceedings |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.source.none.fl_str_mv |
Scopus reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1808128390134235136 |