FPGA discrete wavelet transform encoder/decoder implementation

• Autor(a) principal: Cox, Pedro Henrique
• Data de Publicação: 2006
• Outros Autores: De Carvalho, Aparecido Augusto
• Tipo de documento: Artigo de conferência
• Idioma: eng
• Título da fonte: Repositório Institucional da UNESP
• Texto Completo: http://dx.doi.org/10.1007/11893295_123; http://hdl.handle.net/11449/219407

In a multi-input an multi-output feedforward wavelet neural network, orthogonal wavelet basis functions are used as activate function instead of sigmoid function of feedforward network. This paper adresses the solution on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. One integrated circuit Encoder/Decoder, ultrasonic range, is presented. © Springer-Verlag Berlin Heidelberg 2006.