Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes
Autor(a) principal: | |
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Data de Publicação: | 2017 |
Outros Autores: | , , , , , , , |
Tipo de documento: | Artigo de conferência |
Idioma: | eng |
Título da fonte: | Repositório Institucional da UNESP |
Texto Completo: | http://dx.doi.org/10.1109/S3S.2016.7804384 http://hdl.handle.net/11449/169422 |
Resumo: | One of future device candidates for the Si platform integration, the Ge pFinFET, is evaluated for two different shallow-trench-isolation (STI) processes at low temperature operation. The effective mobility around 700 cm2/Vs at 77 K is reported for both STI processes, as a result of the compressive strain in the channel. Regarding the OFF-state region, it is found that the substrate current plays an important role at room temperature and for long channels. It decreases up to three orders of magnitude from room temperature down to 200 K, as long as the p-n junction reverse current from the drain to bulk dominates the substrate current. |
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Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processesGe pFinFETlong strained devicelow temperature operationSTI firstSTI lastOne of future device candidates for the Si platform integration, the Ge pFinFET, is evaluated for two different shallow-trench-isolation (STI) processes at low temperature operation. The effective mobility around 700 cm2/Vs at 77 K is reported for both STI processes, as a result of the compressive strain in the channel. Regarding the OFF-state region, it is found that the substrate current plays an important role at room temperature and for long channels. It decreases up to three orders of magnitude from room temperature down to 200 K, as long as the p-n junction reverse current from the drain to bulk dominates the substrate current.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Fonds Wetenschappelijk OnderzoekLSI PSI USP University of Sao PauloImecUNESP Univ. Estadual Paulista Campus de São João da Boa VistaE.E. Dept. KU LeuvenUNESP Univ. Estadual Paulista Campus de São João da Boa VistaUniversidade de São Paulo (USP)ImecUniversidade Estadual Paulista (Unesp)KU LeuvenDe Oliveira, Alberto ViniciusSimoen, EddyDer Agopian, Paula Ghedini [UNESP]Martino, João AntonioMitard, JérômeWitters, LiesbethCollaert, NadineThean, AaronClaeys, Cor2018-12-11T16:45:49Z2018-12-11T16:45:49Z2017-01-03info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/S3S.2016.78043842016 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2016.http://hdl.handle.net/11449/16942210.1109/S3S.2016.78043842-s2.0-85011317573Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPeng2016 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2016info:eu-repo/semantics/openAccess2021-10-23T21:47:00Zoai:repositorio.unesp.br:11449/169422Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462021-10-23T21:47Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
title |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
spellingShingle |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes De Oliveira, Alberto Vinicius Ge pFinFET long strained device low temperature operation STI first STI last |
title_short |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
title_full |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
title_fullStr |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
title_full_unstemmed |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
title_sort |
Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes |
author |
De Oliveira, Alberto Vinicius |
author_facet |
De Oliveira, Alberto Vinicius Simoen, Eddy Der Agopian, Paula Ghedini [UNESP] Martino, João Antonio Mitard, Jérôme Witters, Liesbeth Collaert, Nadine Thean, Aaron Claeys, Cor |
author_role |
author |
author2 |
Simoen, Eddy Der Agopian, Paula Ghedini [UNESP] Martino, João Antonio Mitard, Jérôme Witters, Liesbeth Collaert, Nadine Thean, Aaron Claeys, Cor |
author2_role |
author author author author author author author author |
dc.contributor.none.fl_str_mv |
Universidade de São Paulo (USP) Imec Universidade Estadual Paulista (Unesp) KU Leuven |
dc.contributor.author.fl_str_mv |
De Oliveira, Alberto Vinicius Simoen, Eddy Der Agopian, Paula Ghedini [UNESP] Martino, João Antonio Mitard, Jérôme Witters, Liesbeth Collaert, Nadine Thean, Aaron Claeys, Cor |
dc.subject.por.fl_str_mv |
Ge pFinFET long strained device low temperature operation STI first STI last |
topic |
Ge pFinFET long strained device low temperature operation STI first STI last |
description |
One of future device candidates for the Si platform integration, the Ge pFinFET, is evaluated for two different shallow-trench-isolation (STI) processes at low temperature operation. The effective mobility around 700 cm2/Vs at 77 K is reported for both STI processes, as a result of the compressive strain in the channel. Regarding the OFF-state region, it is found that the substrate current plays an important role at room temperature and for long channels. It decreases up to three orders of magnitude from room temperature down to 200 K, as long as the p-n junction reverse current from the drain to bulk dominates the substrate current. |
publishDate |
2017 |
dc.date.none.fl_str_mv |
2017-01-03 2018-12-11T16:45:49Z 2018-12-11T16:45:49Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1109/S3S.2016.7804384 2016 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2016. http://hdl.handle.net/11449/169422 10.1109/S3S.2016.7804384 2-s2.0-85011317573 |
url |
http://dx.doi.org/10.1109/S3S.2016.7804384 http://hdl.handle.net/11449/169422 |
identifier_str_mv |
2016 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2016. 10.1109/S3S.2016.7804384 2-s2.0-85011317573 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
2016 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2016 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.source.none.fl_str_mv |
Scopus reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
|
_version_ |
1803046890676158464 |