Application of UTBBBE SOI tunnel-FET as a dual-technology transistor

Detalhes bibliográficos
Autor(a) principal: Carlos Mori, A. B.
Data de Publicação: 2019
Outros Autores: Paula Agopian, G. D. [UNESP], Martino, Joao A.
Tipo de documento: Artigo de conferência
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.1109/SBMicro.2019.8919316
http://hdl.handle.net/11449/198329
Resumo: In this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias condition. The principle is based on the carrier type generated by the back gate electric field. For negative back gate and drain biases applied in the device studied in this work, it works like a pTFET, while for positive ones it operates as an nMOS. TCAD device simulation was used for the proof of concept.
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spelling Application of UTBBBE SOI tunnel-FET as a dual-technology transistordual technology transistorMOSFETReconfigurable transistorSilicon-On-Insulator (SOI)Tunnel-FETIn this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias condition. The principle is based on the carrier type generated by the back gate electric field. For negative back gate and drain biases applied in the device studied in this work, it works like a pTFET, while for positive ones it operates as an nMOS. TCAD device simulation was used for the proof of concept.University of Sao Paulo LSI/PSI/USPUNESP Sao Paulo State UniversityUNESP Sao Paulo State UniversityUniversidade de São Paulo (USP)Universidade Estadual Paulista (Unesp)Carlos Mori, A. B.Paula Agopian, G. D. [UNESP]Martino, Joao A.2020-12-12T01:09:52Z2020-12-12T01:09:52Z2019-08-01info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObjecthttp://dx.doi.org/10.1109/SBMicro.2019.8919316SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices.http://hdl.handle.net/11449/19832910.1109/SBMicro.2019.89193162-s2.0-85077182307Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengSBMicro 2019 - 34th Symposium on Microelectronics Technology and Devicesinfo:eu-repo/semantics/openAccess2021-10-23T09:55:37Zoai:repositorio.unesp.br:11449/198329Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462021-10-23T09:55:37Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
title Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
spellingShingle Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
Carlos Mori, A. B.
dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
title_short Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
title_full Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
title_fullStr Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
title_full_unstemmed Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
title_sort Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
author Carlos Mori, A. B.
author_facet Carlos Mori, A. B.
Paula Agopian, G. D. [UNESP]
Martino, Joao A.
author_role author
author2 Paula Agopian, G. D. [UNESP]
Martino, Joao A.
author2_role author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
dc.contributor.author.fl_str_mv Carlos Mori, A. B.
Paula Agopian, G. D. [UNESP]
Martino, Joao A.
dc.subject.por.fl_str_mv dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
topic dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
description In this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias condition. The principle is based on the carrier type generated by the back gate electric field. For negative back gate and drain biases applied in the device studied in this work, it works like a pTFET, while for positive ones it operates as an nMOS. TCAD device simulation was used for the proof of concept.
publishDate 2019
dc.date.none.fl_str_mv 2019-08-01
2020-12-12T01:09:52Z
2020-12-12T01:09:52Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/conferenceObject
format conferenceObject
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.1109/SBMicro.2019.8919316
SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices.
http://hdl.handle.net/11449/198329
10.1109/SBMicro.2019.8919316
2-s2.0-85077182307
url http://dx.doi.org/10.1109/SBMicro.2019.8919316
http://hdl.handle.net/11449/198329
identifier_str_mv SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices.
10.1109/SBMicro.2019.8919316
2-s2.0-85077182307
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
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