Study of the utbbbe soi tunnel-fet working as a dual-technology transistor

Detalhes bibliográficos
Autor(a) principal: Mori, Carlos A. B.
Data de Publicação: 2021
Outros Autores: Agopian, Paula G. D. [UNESP], Martino, João A.
Tipo de documento: Artigo
Idioma: eng
Título da fonte: Repositório Institucional da UNESP
Texto Completo: http://dx.doi.org/10.29292/jics.v16i2.208
http://hdl.handle.net/11449/222332
Resumo: — In this work we further investigate the operation of theBESOI (Back-Enhanced Silicon-On Insulator) Dual-Technology FET, analyzing not only its behavior as a p-type Tunnel-FET when a negative back bias is applied to the struc-ture, but also as an nMOS when a positive back bias is applied. The working principle is based on the generation of a channel of either holes or electrons by the back gate electric field, which can then be depleted through the front gate bias. TCAD device simulation was used for the proof of concept.
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spelling Study of the utbbbe soi tunnel-fet working as a dual-technology transistorDual technology transistorMOSFETReconfigurable transistorSilicon-On-Insulator (SOI)Tunnel-FET— In this work we further investigate the operation of theBESOI (Back-Enhanced Silicon-On Insulator) Dual-Technology FET, analyzing not only its behavior as a p-type Tunnel-FET when a negative back bias is applied to the struc-ture, but also as an nMOS when a positive back bias is applied. The working principle is based on the generation of a channel of either holes or electrons by the back gate electric field, which can then be depleted through the front gate bias. TCAD device simulation was used for the proof of concept.Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)LSI/PSI/USP University of Sao PauloUNESP Sao Paulo State UniversityUNESP Sao Paulo State UniversityCAPES: 2017/26489-7CNPq: 2017/26489-7FAPESP: 2017/26489-7Universidade de São Paulo (USP)Universidade Estadual Paulista (UNESP)Mori, Carlos A. B.Agopian, Paula G. D. [UNESP]Martino, João A.2022-04-28T19:44:05Z2022-04-28T19:44:05Z2021-08-23info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articlehttp://dx.doi.org/10.29292/jics.v16i2.208Journal of Integrated Circuits and Systems, v. 16, n. 2, 2021.1872-02341807-1953http://hdl.handle.net/11449/22233210.29292/jics.v16i2.2082-s2.0-85114042759Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengJournal of Integrated Circuits and Systemsinfo:eu-repo/semantics/openAccess2022-04-28T19:44:05Zoai:repositorio.unesp.br:11449/222332Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestopendoar:29462024-08-05T19:42:04.953169Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false
dc.title.none.fl_str_mv Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
title Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
spellingShingle Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
Mori, Carlos A. B.
Dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
title_short Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
title_full Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
title_fullStr Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
title_full_unstemmed Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
title_sort Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
author Mori, Carlos A. B.
author_facet Mori, Carlos A. B.
Agopian, Paula G. D. [UNESP]
Martino, João A.
author_role author
author2 Agopian, Paula G. D. [UNESP]
Martino, João A.
author2_role author
author
dc.contributor.none.fl_str_mv Universidade de São Paulo (USP)
Universidade Estadual Paulista (UNESP)
dc.contributor.author.fl_str_mv Mori, Carlos A. B.
Agopian, Paula G. D. [UNESP]
Martino, João A.
dc.subject.por.fl_str_mv Dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
topic Dual technology transistor
MOSFET
Reconfigurable transistor
Silicon-On-Insulator (SOI)
Tunnel-FET
description — In this work we further investigate the operation of theBESOI (Back-Enhanced Silicon-On Insulator) Dual-Technology FET, analyzing not only its behavior as a p-type Tunnel-FET when a negative back bias is applied to the struc-ture, but also as an nMOS when a positive back bias is applied. The working principle is based on the generation of a channel of either holes or electrons by the back gate electric field, which can then be depleted through the front gate bias. TCAD device simulation was used for the proof of concept.
publishDate 2021
dc.date.none.fl_str_mv 2021-08-23
2022-04-28T19:44:05Z
2022-04-28T19:44:05Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://dx.doi.org/10.29292/jics.v16i2.208
Journal of Integrated Circuits and Systems, v. 16, n. 2, 2021.
1872-0234
1807-1953
http://hdl.handle.net/11449/222332
10.29292/jics.v16i2.208
2-s2.0-85114042759
url http://dx.doi.org/10.29292/jics.v16i2.208
http://hdl.handle.net/11449/222332
identifier_str_mv Journal of Integrated Circuits and Systems, v. 16, n. 2, 2021.
1872-0234
1807-1953
10.29292/jics.v16i2.208
2-s2.0-85114042759
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv Journal of Integrated Circuits and Systems
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.source.none.fl_str_mv Scopus
reponame:Repositório Institucional da UNESP
instname:Universidade Estadual Paulista (UNESP)
instacron:UNESP
instname_str Universidade Estadual Paulista (UNESP)
instacron_str UNESP
institution UNESP
reponame_str Repositório Institucional da UNESP
collection Repositório Institucional da UNESP
repository.name.fl_str_mv Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)
repository.mail.fl_str_mv
_version_ 1808129107740852224

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